Homework Reading Machine Projects Labs

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Presentation transcript:

Homework Reading Machine Projects Labs Tokheim, Chapter 3, 4, and 6.1 - 6.3 Logg-o on Analytical Engine Website Machine Projects Continue on mp3 Labs Continue in labs with your assigned section

Combining Basic Logic Gates Decoders Encoders Selectors - Multiplexers ALUs Control Units Buses Simple computers

Binary Decoder Logic with n input lines and 2n output lines Only one output is a 1 for any given input Binary Decoder n inputs 2n outputs

Building a Binary Decoder Start with a 2-bit decoder: AND Y0 AND X0 Y1 X1 AND Y2 X0 X1 Y 0 0 Y0=1 0 1 Y1=1 0 Y2=1 1 1 Y3=1 AND Y3 Enable

Then Add Two to Make Three... X0 2-bit Decoder Y0 Y1 Y2 X1 Y3 X2 NOT 2-bit Decoder Y4 Y5 Y6 Y7

Developing an Encoder If we can decode, then we need to encode Encode from 1 out of n into a binary weighted form A keyboard encoder does this X0 NC X1 OR Y0 X2 OR X3 Y1 X4 OR ... Y2 X7

Next Comes a Selector Like a switch; also called a multiplexer or MUX Again, build it up from simple basic logic gates S1 S2 MUX or Selector a b y c d

A 1-bit Selector S1 S2 Decoder O R AND a AND b y AND c AND d

A 4-bit Selector S S0 S1 MUX A a0 B b0 Y0 Y c0 C d0 D Y1 S 2 Y2 4 MUX

The ALU Is Next Logical and arithmetic operations Variations in Base Binary Decimal BCD Implementation Serial Parallel Pipelined A B Control Signals ALU CCs f(A,B)

Simple Example - Binary Adder Develop a half-adder (HA) Use two HA’s to build a full-adder (FA)

The Half-Adder and or not a b Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 a b HA Sum Cout a b XOR Sum AND Cout

From HA to FA a b cin Sum Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 a b cin Full Adder Sum cout sum a Half Adder b Cout Cout OR Half Adder Cout Sum cin

Using Full Adders for 2-bit Addition a b Cin Sum0 C0 LSB 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 0 1 MSBs Cn-1 Sumn Cn 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 a0 b0 Full Adder Sum0 C0 C0 a1 b1 Full Adder Sum1 C1 0 0 0 0 1 1 1 1 + 1 1 + 0 1 + 0 1 +1 1 (0) 1 1 (0) 0 1 (1) 0 0 (1) 1 0 Note: The carry flag value after the addition represents the N+1 bit value in the result

Using Full Adders for Subtraction Difference = a - b = a + (-b) = a + (~b + 1) = a + ~b + 1 a ~b C0 Sum C1 LSB 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 MSBs Cn-1 Cn 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 a0 ~b0 Full Adder Sum0 C0 C0 a1 ~b1 Full Adder Sum1 C1 (1) 0 0 0 0 (0)1 1 1 1 - 1 1 + 0 1 - 0 1 + 1 1 0 1 (0) 0 1 1 0 (1) 1 0 Note: The carry flag value after the ~ and addition is the opposite of the subtract borrow condition

Configurable Add/Subtract ALU Subtract/Add # From Instruction Decoding Logic (0 for add 1 for subtract) EFlags Register Full Adder Sum0 a0 XOR b0 C0 . Zero Flag NOR . . . Sign Flag Cn-2 Full Adder Sumn-1 Cn-1 an-1 Overflow Flag = Cn-2*Cn-1# XOR bn-1 Carry Flag XOR