Computer Architecture & Operations I

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Presentation transcript:

Computer Architecture & Operations I Instructor: Ryan Florin

Bit, Byte, and Word 1 Bit – 0 or 1 1 Byte – 8 bits 1 Word – N bytes (in general) 4 bytes in a word (in our book)

Most Significant Bit and Least Significant Bit Most Significant Bit (High-Order Bit) The bit position having the greatest value Usually the left-most bit Least Significant Bit (Low-Order Bit) The bit position having the smallest value Usually the right-most bit

Endianness Big Endian Little Endian The Most Significant Bit is first The Least Significant Bit is first

Binary Representation of Integers Unsigned Integers 0 and positive integers only Signed Integers 0, negative, and positive integers Three ways Sign-Magnitude 1’s Complement 2’s Complement

Unsigned Integers Unsigned Integers Example Consider a word = 4 bytes Can represent numbers from 0 to 4294967295 Decimal: 0 to 232-1 Binary: 0 to 111111111111111111111111111111112 Example 671210 = 00000000 00000000 00011010 001110002

Signed Integer – Sign Magnitude Use the most significant bit of the word to represent the sign 0 – Positive 1 – Negative Rest of the number is encoded in magnitude part Example 671210 = 00000000 00000000 00011010 001110002 -671210 = 10000000 00000000 00011010 001110002 Two representations of 0 0 = 00000000 00000000 00000000 00000000 -0 = 10000000 00000000 00000000 00000000 Cumbersome in Arithmetic

1’s Complement 1’s Complement Negative number is stored as bit-wise complement of corresponding positive number Use the most significant bit of the word to represent the sign 0 – Positive 1 – Negative Example 671210 = 00000000 00000000 00011010 001110002 -671210 = 11111111 11111111 11100101 110001112 Still two representations of zero 0 = 00000000 00000000 00000000 00000000 -0 = 11111111 11111111 11111111 11111111

2’s Complement 2’s Complement Positive number represented in the same way as sign-magnitude and 1’s complement Negative number obtained by taking 1’s complement of positive number and adding 1 671210 = 00000000 00000000 00011010 001110002 1’s comp: -671210 = 11111111 11111111 11100101 110001112 2’s comp: -671210 = 11111111 11111111 11100101 110010002 One version of 0 Convenient in arithmetic

Morgan Kaufmann Publishers 23 July, 2018 Integer Addition Example: 7 + 6 00000000 00000000 00000000 00000111 + 00000000 00000000 00000000 00000110 00000000 00000000 00000000 00001101 §3.2 Addition and Subtraction Chapter 3 — Arithmetic for Computers

Integer Subtraction Subtraction is actually an addition Example: 7 – 6 = 7 + (-6) 2’s complement 00000000 00000000 00000000 00000111 - 11111111 11111111 11111111 11111010 00000000 00000000 00000000 00000001

Overflow Overflow if result out of range Adding +value and –value operands, no overflow Adding two +value operands Overflow if result sign is 1 Adding two –value operands Overflow if result sign is 0

Arithmetic Logic Unit Arithmetic Logic Unit (ALU) Heart of a CPU Operations Arithmetic operations Addition Subtraction Logical operations NOT AND OR

1-bit Logical Unit for AND and OR

1-bit adder

1-bit adder truth table

Simplifying 1-bit adder If a and b and CarryIn are true, then the three other terms are true as well can be simplified as Values when CarryOut is true

Logic of CarryOut Bit

Logic of Sum Bit

Overall 1-bit ALU

What I want you to do Review Appendix B