“Golden” Local Run: Trigger rate = 28Hz

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Presentation transcript:

“Golden” Local Run: 39401 Trigger rate = 28Hz https://twiki.cern.ch/twiki/bin/view/CMS/CSCGoldenRunList Trigger rate = 28Hz Number of events = 400k (~4 hours) Stations/trigger sectors included in readout: All ME+1/1, ME+1/2, ME+2, and ME+3 chambers (167 total): except... All ME+1/3 due to ALCT DAQ format error 5x CSC’s due to difficulties with synchronization ME+3/1/10 due to not working ALCT, not yet investigated 7x CSC’s causing respective DDU to go into Error, not yet investigated One DDU shows error at 2.5k events, one at 375k events: Data totally analyzable… TF CCB configured to send L1A itself, rather than receiving it from TTC configuration… Shouldn’t affect TF data… TMB "clct_stagger" bit was incorrectly set for all chambers except for 4 crates: VMEp[2-3]_[1,6] This affects trigger data from all runs prior to 1 April 2008 Slava pointed out problem from CLCT emulator-data matching… 1 Apr. 2008 G. Rakness (UCLA)

Next… Run with correct clct_stagger configuration Done… trigger rate = 400 Hz?? Download corrected ME+1/3 ALCT firmware Another run with all station +1, 2, 3 CSC’s New DMB firmware FIFO_clear correctly on hard reset Fine adjustment on L1A timing for CFEBs Implement adjustments to line up LCTs at Sector Processor Re-find L1A’s, then take a run… 1 Apr. 2008 G. Rakness (UCLA)

TMB and ALCT configuration Implemented “Configuration Check” button Read parameters from TMB and ALCT and compare with xml file (configuration database) To be done, for example, after Hard Reset… CSC call for TMB/ALCT statement on: Power-up/initialization requirements? Software/configuration requirements? I believe we are implicitly included in the DMB/CFEB requirements: On Power-up: TTC Hard Reset Handshake with Crate Controller Broadcast turn LVMB voltage on (i.e., chambers power ON) Check Flash/Eprom constants loaded properly Run Control Run Start at Configure: TTC Resynch Will return Configured state (no failed state) Q: What about this last statement? 1 Apr. 2008 G. Rakness (UCLA)

TMB firmware downloading Confirmed TMB behavior with SH97 set to 2-3 setting (boot register bit 11 = 0 means disable VME access…): Does not block VME bus on power up, even with borked TMB firmware… However, it is hard to change shunt on 468 installed/cabled TMBs Propose to keep previous downloading procedure… (next page) 1 Apr. 2008 G. Rakness (UCLA)

Put into CVS: Procedure for TMB Firmware Loading DO NOT TOUCH DCS Low Voltage power Broadcast to only one crate of TMBs via slot 25 Click "Download TMB firmware" button. This will… disable TTC commands (by putting CCB into "FPGA" mode) disable TMB VME FPGA access download firmware to TMB through the TMB boot register enable TTC access (by putting CCB into "DLOG" mode) User performs TTC or CCB hard reset Check if TMB is VME ready by clicking "Check TMB VME ready" It will show GREEN if OK, if RED then go back to step 2) If "Check TMB VME ready" is RED 3 times in a row on step 4), STOP, DO NOT POWER CYCLE, call expert. If GREEN on step 5), then hit "Enable VME access to TMB FPGA" button. It has been pointed out that step 5 can fool us… 1 Apr. 2008 G. Rakness (UCLA)