VLSI Architectures For Low-Density Parity-Check (LDPC) Decoders Ahmad Darabiha Supervisors: Prof. A. Chan Carusone, Prof. F.R. Kschischang University of Toronto Connections 2005 June 2005 This is an outline of today’s presentation. First we’ll have a couple slides of some background terms that we’ll need to understand the rest of the presentation. Then we’ll see what gate-oxide breakdown is and understand the physical reasons for it occuring. Once we know what gate-oxide is, we’ll go into the symptoms of breakdown on transistors and circuits. After that we’ll go into the mathematics of the reliability of gate-oxide, which relates the physical reasons for gate oxide breakdown to the distributions that are seen. Then, we’ll present some ways that breakdown can be predicted, and how it can be prevented with careful circuit, and finally we’ll conclude

A Generic Communication Channel Channel coding: Adding redundancy Detecting and correcting errors

Channel Coding: History 1948: Claude Shannon Fundamental theorem in information theory 1960: Reed-Solomon codes CD, DVD, wireless and optical communications 1967: Viterbi decoding (convolutional code) Magnetic recording, space communications 1993: Turbo codes 3G-wireless, satellite communication 1995 (1963): Low-density parity-check (LDPC) codes Digital Video Broadcast (DVB-S2), 10 Gigabit Ethernet over twisted-pair wire

LDPC Codes: Structure Decoding LDPC codes: Message-passing algorithm Iterative Provides fine-level parallelism

LDPC codes: Decoder Architecture Partially parallel Fully parallel

LDPC Decoder: Simulation Results In this work we have introduced two techniques to Reduce the total amount of wirelength -> less congestion Reduce maximum global wirelength -> reduce interconnect delay The decoder results: 2048-bit LDPC code 100 MHz clock 32 iterations per frame 3.2 Gbit/sec throughput 4.2 mm x 4.2 mm die area