Active/3D Packaging Value and Applications ComLSI, Inc February 2010 ComLSI, Inc.

Active Packaging & Market The trend towards smaller, higher performance devices with greater functionality compels integration techniques such as package-on-package or PoP. Active Packaging takes PoP and System-in-Package (SiP) techniques a big step further by providing symbiotic functionality, between active and passive devices within the package, that amplifies the utility and performance of a passive component while minimizing substrate real-estate use and cost. Efficient point-of-load converters employ switched conversion that requires active circuits, inductors and capacitors. Inductor integration has to an extent been made feasible through fabrication of inductors atop processed active silicon – see products by Enpirion Inc., claiming footprint reduction and high ASP’s. US Patent “Active interposer: US 7291896” teaches capacitor integration that further reduces POL DC-DC converter footprint while enabling increased bandwidth. SAPI enables novel devices managing power integrity such as ComLSI’s “Active Noise Regulators” that proactively inject electric charge to minimize load component voltage domain variations. An active circuit interposer isolating a capacitor from a voltage domain permits the use of much higher voltage in the capacitor, quadratically increasing stored energy, and allows the capacitor to be proactive instead of reactive in noise minimization function. US 7291896 protects an ‘active capacitor’ architecture of stacked active passive integration. Microprocessors from Intel® Corporation greatly benefited in power integrity from the use of “land side” capacitors, where capacitors are mounted on the “land” or bottom side of a flip chip or ball grid array package, facing the load ULSI device directly. Active capacitors are the logical next step (from land side capacitors) in the evolution of processor assemblies, as multi-core processors demand ever more sophisticated power and power integrity management techniques. ComLSI disclosed this concept to Intel in late 2004 – early 2005. Intel’s alternative technology, the “CMOS Regulator” employing “Accelerated Regulation” has been determined to be a non-starter as a viable (low cost) component of their processor assembly architecture. Infringement by Intel is therefore imminent, and with multiple voltage domains (each core in a multi-core processor is typically on its own voltage domain) in a high performance microprocessor or SoC, instances of use can exceed 1 billion. Handsets and other portable electronic devices will similarly benefit from high performance, lowest footprint POL voltage converters. With a combined volume for smart phones and other ultra-portable devices, instances of use of SAPI can again exceed 1 billion. In total, the forecast TAM for such SAPI devices is believed to exceed $2B. US 7291896 has a clean execution history with thorough prosecution by the USPTO. No obligations or encumbrances exist. A book, “Power Integrity Analysis and Management for Integrated Circuits”, co-authored by the inventor, to be published by Prentice-Hall in May 2010, discusses the significance of SAPI for PI management and local voltage regulation applications. February 2010 ComLSI, Inc.

Appln: Active Noise Regulation Simulation result with advanced continuum models illustrates noise reduction (left) in an integrated circuit through active noise regulation (ANR). Proactive intervention in an SoC power grid to maintain power integrity, permitting ultra-low-voltage operation and correspondingly low energy consumption. ANR chip size matches high-bandwidth, multi-terminal (IDC) capacitor size (1.25mm by 1mm) and in high volumes, costs less than the IDC cap at ~$0.07. ANR and IDC cap assemblies are easily tested separately and as assembled, and therefore avoid known-good-die issues in assembly with a high-performance SoC or system board. View in Slide Show mode February 2010 ComLSI, Inc.

Local Voltage Regulation (LVR) Typical voltage regulator modules (VRMs) are slow to respond to a high-performance SoC’s voltage domain needs. 3D assembly of an ANR, cap, and integrated inductance provides orders of magnitude higher bandwidth or faster response, and efficient voltage regulation. Local voltage regulation enables local, intelligent supply voltage control and low energy consumption. LVRs minimize energy loss and heat generation in circuit pathways conducting high current. February 2010 ComLSI, Inc.