S-D analog to digital conversion S-D Analog to Digital Converter for CMOS Image Sensors Nonu Singh (RIT, MicroE Co-Op) Background Testing of the detector control electronics is needed to supply correct bias voltages and clocks. Understanding the operation of the image sensor is important to configure the test bed and measure the operation. Goals Evaluate the S-D analog to digital conversion technique for CMOS image sensors Develop a testing plan for the CMOS image sensor Plan Design and fabricate necessary interface to supply clocks and biases to the CMOS image sensor Measure the electrical and optical characteristics of the CMOS image sensor Operation Photo detector Second order S-D modulator P I N - + A second order S-D modulator structure is obtained by extending the first order S-D modulator with an additional integrator unit. S-D analog to digital conversion Transfer function: xQ[n]=z-1.x[n]+(1-z-1)2.e[n] Generic architecture of a CMOS image sensor A CMOS image sensor consists of an array of pixel sensors, each pixel containing a photo detector and an active amplifier. Advantages over single order S-D A to D converter Noise is filtered with second order high pass filter. Quantization noise is even more suppressed. SNR is increases by 15 dB or 2.5 bits for every frequency doubling. Input is fed to quantizer via integrator. Quantized output feeds back to the input signal. Transfer function: xQ[n]= z-1.x[n]+(1-z-1).e[n] Response on applying Digital Filter Any persistent difference between them accumulates in the integrator and eventually corrects itself. Average value of the quantized signal tracks the average input. The density of "ones" at the modulator output is proportional to the input signal. Noise shaping using S-D Modulation Low pass filtration of input signal High pass filtration of quantization noise Most of the quantization noise is pushed into higher frequencies.