An Efficient Software Radio Implementation of the UMTS Turbo Codec Matthew C. Valenti Assistant Professor Lane Dept. of Comp. Sci. & Elect. Eng. West Virginia University Morgantown, WV 26506-6109

UMTS Turbo Encoder From ETSI TS 125 212 v3.4.0 (2000-09) Systematic Output Xk Input Xk “Upper” RSC Encoder Uninterleaved Parity Zk Output “Lower” RSC Encoder Interleaved Parity Z’k Interleaver Interleaved Input X’k From ETSI TS 125 212 v3.4.0 (2000-09) UMTS Multiplexing and channel coding Data is segmented into blocks of L bits. where 40  L  5114 © 2001

UMTS Interleaver: Inserting Data into Matrix Data is fed row-wise into a R by C matrix. R = 5, 10, or 20. 8  C  256 If L < RC then matrix is padded with dummy characters. X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 X32 X33 X34 X35 X36 X37 X38 X39 X40 © 2001

UMTS Interleaver: Intra-Row Permutations Data is permuted within each row. Permutation rules are rather complicated. See spec for details. X2 X6 X5 X7 X3 X4 X1 X8 X10 X12 X11 X15 X13 X14 X9 X16 X18 X22 X21 X23 X19 X20 X17 X24 X26 X28 X27 X31 X29 X30 X25 X32 X40 X36 X35 X39 X37 X38 X33 X34 © 2001

UMTS Interleaver: Inter-Row Permutations Rows are permuted. If R = 5 or 10, the matrix is reflected about the middle row. For R=20 the rule is more complicated and depends on L. See spec for R=20 case. X40 X36 X35 X39 X37 X38 X33 X34 X26 X28 X27 X31 X29 X30 X25 X32 X18 X22 X21 X23 X19 X20 X17 X24 X10 X12 X11 X15 X13 X14 X9 X16 X2 X6 X5 X7 X3 X4 X1 X8 © 2001

UMTS Interleaver: Reading Data From Matrix Data is read from matrix column-wise. Thus: X’1 = X40 X’2 = X26 X’3 = X18 … X’38 = X24 X’2 = X16 X’40 = X8 X40 X36 X35 X39 X37 X38 X33 X34 X26 X28 X27 X31 X29 X30 X25 X32 X18 X22 X21 X23 X19 X20 X17 X24 X10 X12 X11 X15 X13 X14 X9 X16 X2 X6 X5 X7 X3 X4 X1 X8 © 2001

Recursive Systematic Convolutional (RSC) Encoder Systematic Output (Upper Encoder Only) Parity Output (Both Encoders) D D D Upper and lower encoders are identical: Feedforward generator is 15 in octal. Feedback generator is 13 in octal. © 2001

Trellis Termination XL+1 XL+2 XL+3 ZL+1 ZL+2 ZL+3 D D D After the Lth input bit, a 3 bit tail is calculated. The tail bit equals the fed back bit. This guarantees that the registers get filled with zeros. Each encoder has its own tail. The tail bits and their parity bits are transmitted at the end. © 2001

Total number of coded bits = 3L + 12 Output Stream Format The format of the output steam is: X1 Z1 Z’1 X2 Z2 Z’2 … XL ZL Z’L XL+1 ZL+1 XL+2 ZL+2 XL+3 ZL+3 X’L+1 Z’L+1 X’L+2 Z’L+2 X’L+3 Z’L+3 L data bits and their associated 2L parity bits (total of 3L bits) 3 tail bits for upper encoder and their 3 parity bits 3 tail bits for lower encoder and their 3 parity bits Total number of coded bits = 3L + 12 Code rate: © 2001

Channel Model and LLRs Channel gain: a Noise Xk = {0,1} Sk = {-1,1} Yk R(Xk) BPSK Modulator ak nk Channel gain: a Rayleigh random variable if Rayleigh fading a = 1 if AWGN channel Noise variance is: © 2001

SISO-MAP Decoding Block Decoder V(Xk) (Xk) R(Zk) Two input streams: V(Xk): All information about systematic bit. V(Xk) = R(Xk) + w(Xk) w(Xk) is a priori information passed from other decoder. Is the extrinsic information produced by other decoder. R(Zk) observed parity bit for this constituent code. One output stream: Log-likelihood ratio: © 2001

Turbo Decoding Architecture w (Xk) V1(Xk) “Upper” MAP Decoder R(Xk) 1(Xk) R(Zk) V2(Xk) R(Z’k) Interleave V2(X’k) “Lower” MAP Decoder 2(X’k) 2(Xk) Deinnterleave Initialization and timing: w(Xk) is initialized to all zeros. Upper decoder executes first, then lower decoder.

Log-MAP Algorithm: Overview Log-MAP algorithm is MAP implemented in log-domain. Multiplications become additions. Additions become special “max*” operator (Jacobi logarithm) Log-MAP is similar to the Viterbi algorithm. Except “max” is replaced by “max*” in the ACS operation. Processing: Sweep through the trellis in forward direction using modified Viterbi algorithm. Sweep through the trellis in backward direction using modified Viterbi algorithm. Determine LLR for each trellis section. Determine output extrinsic info for each trellis section. © 2001

The max* operator max* must implement the following operation: Ways to accomplish this: C-function calls or large look-up-table. Max operator. Rough correction value. Linear approximation. log-MAP max-log-MAP constant-log-MAP © 2001 linear-log-MAP

The Correction Function linear-log-MAP Constant-log-MAP fc(|y-x|) log-MAP |y-x|

The Trellis for UMTS Dotted line = data 0 Solid line = data 1 Note that each node has one each of data 0 and 1 entering and leaving it. The branch from node Si to Sj has metric ij  00 S0 S0  10 S1 S1 S2 S2 S3 S3 S4 S4 S5 S5 S6 S6 data bit associated with branch Si Sj parity bit associated with branch Si Sj S7 S7 © 2001

Forward Recursion A new metric must be calculated for each node in the trellis using: where i1 and i2 are the two states connected to j. Start from the beginning of the trellis (i.e. the left edge). Initialize stage 0: o = 0 i = - for all i  0  00 ’0  0  10 ’1  1 ’2  2 ’3  3 ’4  4 ’5  5 ’6  6 ’7  7 © 2001

Backward Recursion A new metric must be calculated for each node in the trellis using: where j1 and j2 are the two states connected to i. Start from the end of the trellis (i.e. the right edge). Initialize stage L+3: o = 0 i = - for all i  0  00 0 ’0  10 1 ’1 2 ’2 3 ’3 4 ’4 5 ’5 6 ’6 7 ’7 © 2001

Log-likelihood Ratio The likelihood of any one branch is: The likelihood of data 1 is found by summing the likelihoods of the solid branches. The likelihood of data 0 is found by summing the likelihoods of the dashed branches. The log likelihood ratio (LLR) is:  00  0 0  10 1 1  2 2  3 3  4 4 5 5 6 6  7 7 © 2001

Memory Usage Issues No need to store both alpha and beta in trellis. Compute beta first and store in trellis. Then compute alpha and derive LLR estimates at the same time. No need to store alpha trellis. The metrics keep getting larger and larger. Floating point: loss of precision. Fixed point: overflow. Solution: normalize the metrics: An alternative normalization saves memory: © 2001

Performance Comparison: 5114 bit UMTS turbo code 10 -1 10 Fading -2 10 -3 10 AWGN BER -4 10 constant- log-MAP -5 10 log-MAP -6 10 linear- log-MAP max-log-MAP -7 10 0.5 1 1.5 2 Eb/No in dB

Average Number of Decoder Iterations 16 14 12 constant- log-MAP 10 log-MAP avg. number of iterations 8 max-log-MAP 6 4 linear-log-MAP 2 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Eb/No in dB

Dynamic Halting Turbo decoding progresses until a fixed number of iterations have completed. However, the decoder will often converge early. Can stop once it has converged (i.e. BER = 0). Stopping early can greatly increase the throughput. For a simulation, it is reasonable to automatically halt once the BER goes to zero. Requires knowledge of the data. For an actual system, a “blind” method for halting is desirable. Blind --- don’t know the data. Simple blind estimator: Stop when LLR exceeds threshold. © 2001

Conclusion Features of the decoder: For more information, visit: Accurate and efficient max* calculation. Simplified branch metrics. Reduced storage by proper normalization. Simple but effective blind halting technique. For more information, visit: http:www.csee.wvu.edu/~mvalenti/turbo.html A DOS demonstration of the code is available. Also, these slides are available. This work was sponsored by the Office of Naval Research and Mercury Computer Systems. © 2001