Sensor Wafer: Final Layout Massimiliano Fiorini CERN NA62 Gigatracker Working Group Meeting 31st March 2009

Proposed wafer layout Scribe line width: 100 m

Wafer layout

Pixel and Bump Bonding Pad 300 m × 300 m pixel cell p+ implantation 280 × 280 m2 metal layer 288 × 288 m2 (4 m overlap) octagonal shape bonding pad 26 m with 20 m passivation opening Medipix/ALICE pad design bump pad center at 50 m from the pixel edge

Bump pads (full size sensor)

Guard rings and pads 12 guard rings structure 1st ring 300 m wide the other rings: 25 m metal width (15 m p+ implantation) at increasing distance 215 m (415 m) distance from “normal” (on-pixel) bump-pads to those on the guard ring

Full size sensor 18000 pixels 90 × 200 matrix 29.34 × 63.14 mm2 effective size on wafer 27.0 × 60.8 mm2 active area

Single chip size sensor 1800 pixels (45 × 40 matrix) 3 types: A: 300 m × 300 m pixels everywhere B: enlarged pixels in lateral columns (300 m × 400 m) A and B have circular openings in the back side C: as B but completely opened in the back side 15.84 × 14.34 (14.54) mm2 effective size on wafer 13.5 × 12.0 (12.2) mm2 active area

CERN prototype 60 pixels 6 × 10 matrix 4.14 × 5.34 mm2 effective size on wafer 1.17 mm distance from last active pixel cell and sensor edge

Torino prototype 105 pixels 7 × 15 matrix 4.44 × 6.84 mm2 effective size on wafer 1.17 mm distance from last active pixel cell and sensor edge

Back side metallization opened back side metallization for one single chip size sensor and for 50% of prototypes 15 m distance from frame to last active pixel edge

Circular openings 100 m opening diameter aligned on pixel center some also on the corner of 4 pixels (for large sensor and single chip size sensors only)

Single chip size, full-size sensor 9 circular openings centered on pixel 2 openings placed at the corner of 4 pixels this structure is repeated 10 times for the full-size sensor

CERN prototype back-side 5 circular openings centered on pixel 50% of sensors (10) are completely opened

Torino prototype back-side 5 circular openings centered on pixel 50% of sensors (8) are completely opened

Alignment marks (front) two 50 m × 50 m squares at the four corners of all sensors (except test structures) 110 m distance from scribe line to closest square

Alignment marks (back) two 50 m × 50 m squares at the four corners of all sensors (except test structures) 110 m distance from scribe line to closest square

Additional information Test structures 20×3 matrix Diodes Wafer Front Side (p+) Diodes and the 20×3 matrix have openings for laser testing Chip numbering on large sensor from 0 to 9 Structure labels: GTK SENSOR SINGLE CHIP A-TYPE SINGLE CHIP B-TYPE SINGLE CHIP C-TYPE CERN PROTOTYPE SENSOR TO PROTOTYPE SENSOR Wafer Back Side (n+)  Dicing lanes opened (120 m wide opening)

CERN dummy r-o chip 2.8 mm × 6.7 mm total size on wafer (maximum size from MOSIS is 3.8 mm × 7.7 mm) 215 m distance from “normal” bump-bond pads to those on the guard ring 62 m × 125 m wire-bond pads 20 m octagonal bump-bond pad 364 and 311 m (plus ~25 m) distance from sensor edge and beginning of wire bonding pads

CERN dummy r-o chip 2.8 mm × 6.7 mm total size on wafer (maximum size from MOSIS is 3.8 mm × 7.7 mm) 215 m distance from “normal” bump-bond pads to those on the guard ring 62 m × 125 m wire-bond pads 20 m octagonal bump-bond pad 364 and 311 m (plus ~25 m) distance from sensor edge and beginning of wire bonding pads

Torino dummy r-o chip 4.0 mm × 5.0 mm total size on wafer 365.76 m distance from “normal” bump-bonding pads to the one on the guard ring 62 m × 125 m wire-bond pads 20 m octagonal bump-bond pad 132 m (plus ~25 m) distance from sensor edge and beginning of wire bonding pads

Torino dummy r-o chip 4.0 mm × 5.0 mm total size on wafer 365.76 m distance from “normal” bump-bonding pads to the one on the guard ring 62 m × 125 m wire-bond pads 20 m octagonal bump-bond pad 132 m (plus ~25 m) distance from sensor edge and beginning of wire bonding pads

Conclusion Final layout for CERN and Torino read-out chip prototypes sent to FBK last week (after submission to MOSIS) cross-check .gds files define layout for dummy read-out chips All details on sensor masks will be finalized by the end of this week FBK processed wafers should be ready by end of June – beginning of July 2009

SPARES

Wafer Material 4” high resistivity FZ wafers <100> or <111> (preferred <100> for dicing reasons) Resistivity: 4-8 kΩcm n-type, phosphorous doped Thickness: 200 m Bow: < 30 m to comply with flip chip bonding requirements

Operation parameters Depletion voltage: < 30 V Operation voltage: > 300-500 V Breakdown voltage: > 500 V Dark current @ operation voltage: < 8 nA/cm2 at 20 °C (approximately 150 nA for full size sensor) Multi-guard structure for sensor: according to FBK, the 12 guard rings option is most suitable for high voltage operation Distance between last active pixel edge and scribe line is 1.17 mm

Bump pad arrangement Pad arrangement scheme: mirrored bump pads on neighboring columns

Sensor elements on wafer Name Description Active size Number of structures per wafer 1 GTK sensor 2 x 5 pixel chip matrices (10 x 1800 pixels) 27.0 mm x 60.8 mm 2 Single chip sensor (A) 1800 pixels 13.5 mm x 12.0 mm 3 Single chip sensor (B) 1800 pixels (enlarged pixel cells at the edges to resemble full size sensor) 13.5 mm x 12.2 mm 4 TO demonstrator sensor 105 pixel cells (7 x 15) 2.1 mm x 4.5 mm ~16 5 CERN demonstrator sensor 45 pixel cells (6 x 10) 1.8 mm x 3.0 mm ~20 6 Diode (CMS) Test diode with multiguard structure and opening in the Al 7.0 mm x 7.0 mm 7 RADMON diode 8.0 mm x 8.0 mm 8 20x3 matrix Test structure with 300 μm x 300 μm pixels as used on ALICE wafers, please add opening in the central pads for laser measurements 0.9 mm x 6.0 mm 9 FBK test structures

Full-size sensor: front side (p+)

Full-size sensor: back side

Parameters used in simulation (1)

Parameters used in simulation (2)

Drift velocity E ~1.5-2.5 x104 V/cm for V ~300-500 V from Sze, Semiconductor Devices, 1985