Design Rule EMT 251

Design Rules Design rules are a set of geometrical specifications that dictate the design of the layout masks A design rule set provides numerical values For minimum dimensions For minimum line spacings Design rules must be followed to insure functional structures on the fabricated chip Design rules change with technological advances (www.mosis.org)

Silicon Foundry A standard A foundry allows designers to submit designs using a state-of-the-art process Each foundry state simpler set of design rules called lambda design rules All widths, spacings, and distances are written in the form Value = TSMC (Taiwan Semiconductor Manufacturing Corporation)

Design Rules Classification Minimum width Minimum spacing

3D Perspective Polysilicon Aluminum

CMOS Process Layers Layer Polysilicon Metal1 Metal2 Contact To Poly Contact To Diffusion Via Well (p,n) Active Area (n+,p+) Color Representation Yellow Green Red Blue Magenta Black Select (p+,n+)

Layers in 0.35 mm CMOS process

Design rules and Layout Why we use design rules? Interface between designer and process engineer Guidelines for constructing process masks Unit dimension: Minimum line width scalable design rules: lambda parameter absolute dimensions (micron rules)

Intra-Layer Design Rules

Transistor Layout

Vias and Contacts

Select Layer

When a transistor is formed? Gate is formed where polySi crosses diffusion with thin oxide between these layers.

Message from Design Rule Checker Measure twice, fab once!!

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