EET 1131 Unit 6 Exclusive-OR and Exclusive-NOR Gates

Slides:



Advertisements
Similar presentations
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals with PLD Programming.
Advertisements

EET 1131 Unit 6 Exclusive-OR and Exclusive-NOR Gates
EET 1131 Unit 3 Basic Logic Gates
Exclusive-OR and Exclusive-NOR Gates
Functions of Combinational Logic
Overview Part 2 – Combinational Logic Functions and functional blocks
Functions and Functional Blocks
ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices XOR, Parity Circuits, Comparators.
EET 1131 Unit 7 Arithmetic Operations and Circuits
Exclusive-OR and Exclusive-NOR Gates
EET 1131 Unit 6 Exclusive-OR and Exclusive-NOR Gates  Read Kleitz, Chapter 6.  Do Unit 6 e-Lesson.  Homework #6 and Lab #6 due next week.  Quiz next.
CHAPTER 2 Digital Combinational Logic/Arithmetic Circuits.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Lab 04 :Serial Data Control Systems : Slide 2 Slide 3 Slide 4 NOR Gate: NAND Gate: NOR / NAND Alternate Symbols: Slide 5 XOR and XNOR Gate: Serial Data.
In this module you will learn: What the various logic gates do. How to represent logic gates on a circuit diagram. The truth tables for the logic gates.
Based on slides by: Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. ECE/CS 352: Digital System Fundamentals Lecture 10 – Other Gate Types.
Additional Gates BIL- 223 Logic Circuit Design Ege University Department of Computer Engineering.
XOR, XNOR, and Binary Adders
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Digital Logic Design Week 3
CS1Q Computer Systems Lecture 6 Simon Gay. Lecture 6CS1Q Computer Systems - Simon Gay2 Algebraic Notation Writing AND, OR, NOT etc. is long-winded and.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Binary Numbers For digital systems, the.
The inverter performs the Boolean NOT operation. When the input is LOW, the output is HIGH; when the input is HIGH, the output is LOW. The Inverter AX.
ECE 2110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices XOR and parity check Circuits.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Combinational Logic Design
EGR 2131 Unit 6 Combinational Building Blocks
EET 1131 Unit 5 Boolean Algebra and Reduction Techniques
EGR 2131 Unit 3 Gate-Level Minimization
EET 1131 Unit 4 Programmable Logic Devices
EGR 2131 Unit 4 Combinational Circuits: Analysis & Design
Boolean Algebra & Logic Gates
Basics of Logic gates - Part 1
Digital Fundamentals Floyd Chapter 3 Tenth Edition
Overview Part 2 – Combinational Logic Functions and functional blocks
EKT 124 / 3 DIGITAL ELEKTRONIC 1
Engr. Micaela Renee Bernardo
EET 1131 Unit 11 Counter Circuits
Overview Part 1 – Logic Circuits and Boolean Functions
Digital Fundamentals Floyd Chapter 3 Tenth Edition
2-6 Exclusive-OR Operator and Gates
Overview Part 1 – Gate Circuits and Boolean Equations
PROPAGATION DELAY.
EGR 2261 Unit 4 Control Structures I: Selection
Exclusive OR Gate.
Digital Fundamentals Floyd Chapter 6 Tenth Edition
XOR, XNOR, and Binary Adders
EET 2261 Unit 11 Controlling LCD and Keypad
Chapter 4 Gates and Circuits.
EET 2261 Unit 11 Controlling LCD and Keypad
The Bridge Between Symbolic Logic And Electronic Digital Computing
EGR 2131 Unit 8 VHDL for Combinational Circuits
XOR, XNOR, & Binary Adders
EET107/3 DIGITAL ELECTRONICS 1
Digital Fundamentals Floyd Chapter 3 Tenth Edition
EET 1131 Unit 6 Exclusive-OR and Exclusive-NOR Gates
CSC 220: Computer Organization Logic Gates and Functions
Logic Gates.
EET 1131 Unit 3 Basic Logic Gates
EET 2261 Unit 8 Seven-Segment Displays
Overview Part 3 – Additional Gates and Circuits 2-8 Other Gate Types
Chapter 2 Gates.
XOR, XNOR, and Binary Adders
Chapter 5 Combinational Logic Analysis
EGR 2131 Unit 12 Synchronous Sequential Circuits
XOR, XNOR, and Binary Adders
ECE 352 Digital System Fundamentals
EGR 2131 Unit 4 CAD Tools and VHDL
Presentation transcript:

EET 1131 Unit 6 Exclusive-OR and Exclusive-NOR Gates Read Kleitz, Chapter 6. Homework #6 and Lab #6 due next week. Quiz next week. Do Quiz #5. Handouts: xorXnor practice sheet. Fire up Quartus & Multisim. Difference in everyday English between inclusive & exclusive or: “Do you have any ice cream or cake in the kitchen?” vs. “You can have ice cream or cake: which do you want?”

Inclusive-OR versus Exclusive-OR in the English Language Suppose you invite me to a party at your house and I ask you if you have any cake or ice cream in your fridge. Assuming you tell the truth, how would you answer in each of the following cases? Here we’re using OR in the inclusive sense. Cake Ice Cream Your Answer No Yes

Inclusive-OR versus Exclusive-OR in the English Language (Cont’d) Suppose you’ve taken your child to a birthday party and it’s time for dessert. You say to the kid, “You can have cake or ice cream. Which one do you want?” Which of the following cases are you allowing? Here you’re using OR in the exclusive sense. Cake Ice Cream Allowed? No Yes

A X A X The XOR Gate B B The XOR gate produces a HIGH output only when the inputs are at opposite logic levels. The truth table is 0 0 0 1 1 0 1 1 1 -XOR gate has only two inputs. The XOR operation is written as X = AB + AB. Alternatively, it can be written with a circled plus sign between the variables as X = A + B.

Applying Boolean-Algebra Rules to Expressions with XOR The “circle-OR” symbol doesn’t appear in any of our Boolean-algebra rules, so if you’re doing a Boolean simplifcation, write out the longer form shown above for XORs. We’ll do an example later.

The XOR Gate Example waveforms: A B X Notice that the XOR gate will produce a HIGH only when exactly one input is HIGH. Do as Practice Question 1.

Fixed Function Logic Some common gate configurations are shown.

The XNOR operation can be written as X = AB + AB or as X = A + B. The XNOR Gate B B The XNOR gate produces a HIGH output only when the inputs are at the same logic level. The truth table is 0 0 0 1 1 0 1 1 1 -XNOR gate has only two inputs. -As noted earlier, the “circle-OR” symbol doesn’t appear in any of our Boolean rules, so if you’re doing a Boolean derivation, write out the longer form shown above. The XNOR operation can be written as X = AB + AB or as X = A + B.

The XNOR Gate Example waveforms: A B X Notice that the XNOR gate will produce a HIGH when both inputs are the same. This makes it useful for comparison functions. Do as Practice Question 2.

More Than Two Inputs? Some textbooks (including ours) say that XOR and XNOR gates can only have two inputs. Other textbooks say they can have more than two inputs, but there’s some ambiguity in how exactly to define this. The most common way is to say that XOR output is HIGH if and only if an odd number of inputs are HIGH. You won’t find XOR or XNOR chips that have more than two inputs, but Multisim has XOR and XNOR gates with more than two inputs.

Applications of XOR and XNOR Gates Three common applications: Comparators Controlled inverters Parity generation and checking

Convention for Multi-Bit Strings When dealing with multi-bit binary strings, we use subscripts to refer to the individual bits in the string. The least significant bit (LSB) always gets the smallest subscript, which may be either 1 or 0. Example: In a four-bit string A, the bits may be labeled either A4A3A2A1 or A3A2A1A0 12

Application #1: Comparator A comparator compares two strings of bits to see whether they are equal to each other: Example: if string A = 0101 and string B = 0100, then A≠ B. Next slide shows how to build a 4-bit comparator from XNOR gates.

Comparator Circuit (Book’s Fig. 6-14) Look again at XNOR truth-table, particularly 1st and 4th rows. Do Practice Questions 3, 4.

Application #2: Controlled Inverter A controlled inverter takes an input string and, depending on the logic level on a control line, either Leaves the string unchanged or Inverts each bit in the string Next slide shows how to build an 8-bit controlled inverter from XOR gates.

Controlled Inverter (Book’s Fig. 6-15) Do as Practice Questions 5, 6.

Making Connections to the Altera Board In Lab 6 you’ll use the o’scope to display a signal being generated on the Altera board. To do this you must assign the correct pin number in Quartus to send the signal out to a pin on the Altera board’s 14-pin general-purpose I/O connector. Then you must plug in our home-made connector block and use an oscilloscope probe to measure the pin to which you sent your signal. See next slide for pin numbers.

Making Connections to the Altera Board (Cont’d.) Here are the pin numbers to use when you assign pin numbers in Quartus: PIN_D9 PIN_E10 PIN_F14 PIN_H14 PIN_H13 PIN_J14 PIN_J10 This one is GROUND.

Printing from Our Oscilloscopes You can print the oscilloscope screen by pressing the PRINT button. There’s a delay of about 40 seconds before the page will print, so be patient. Only one oscilloscope can print at a time, or else the printer gets confused and prints hundreds of pages. Please shout “Printing!” before you press the PRINT button, and make sure that you don’t print while someone else is waiting for their page to print.

Example Solution Application #3: Parity Checking Parity checking is a method of error detection for simple transmission errors involving one bit. A parity bit is an “extra” bit attached to a group of bits to force the total number of 1’s to be either even (even parity) or odd (odd parity). Example The ASCII character for “a” is 1100001 and for “A” is 1000001. What is the correct bit to append to make both of these have odd parity? Recall ASCII table on p. 19. Solution The ASCII “a” has an odd number of bits that are equal to 1; therefore the parity bit is 0. The ASCII “A” has an even number of bits that are equal to 1; therefore the parity bit is 1.

Parity Generators To implement parity checking, we need circuitry on the sending end that generates the parity bit for each group of bits being sent. This circuitry is called a parity generator. Next slide shows how to build 4-bit even or odd parity generators.

Parity Generators (Book’s Fig. 6-9) Do as Practice Questions 7, 8.

Parity Checkers On the receiving end, we need circuitry that checks the data bits and parity bit as they’re received to decide whether an error has occurred during transmission. This circuitry is called a parity checker. Next slide shows how to build a 4-bit-plus-parity even parity checker.

Parity Checker (Book’s Fig. 6-11)

A Parity Generator/Checker Chip 74280 Nine-bit Parity Generator/Checker Most chips we’ve studied have been SSI (small-scale integration) chips containing fewer than 10 gates that are not connected to each other. The 74280 is an MSI (medium-scale integration) chip. Instead of containing a few disconnected gates, it contains about 45 gates connected internally on the chip to perform a specific function. -Follow links for pin-out and logic symbol. -Mention presence of 74280 and other macrofunctions in Quartus

Parity System (Book’s Fig. 6-13)

Parity Generator/Checker Chip The 74280 can be used to generate a parity bit or to check an incoming data stream for even or odd parity. Checker: The 74280 can test codes with up to 9 bits. The even output will be HIGH if the data lines have even parity; otherwise it will be LOW. Likewise, the odd output will be HIGH if the data lines have odd parity; otherwise it will be LOW. Data inputs S Even S Odd Generator: To generate even parity, the parity bit is taken from the odd parity output. To generate odd parity, the output is taken from the even parity output. Do Practice Question 9. 74280

Applying Boolean-Algebra Rules to Expressions with XOR or XNOR Recall that the “circle-OR” symbol doesn’t appear in any of our Boolean-algebra rules, so if you’re doing a Boolean simplifcation, write out the longer forms shown earlier for XOR and XNOR: Rewrite X = A + B as X = AB + AB. Example: Use Boolean algebra to simplify: Do as Practice Question 10.

Another Example Example: Use Boolean algebra to simplify: