THS5671EVM Test with TSW1400EVM

Hardware Setup: Connect power to both boards. Connect a USB cable between TSW14J10EVM and a host PC. Connect a mini-USB cable between J1 of the ZC706 and a host computer that has Vivado installed. Provide a 50MHz, CMOS level clock to SMA J7 (cmos_clk) of the TSW1400EVM and J5 of the THS5671EVM. The clock sources must be synchronized. A splitter can be used but make sure the clock level at both boards is at the correct level. Connect the data lines between the boards as shown in next slide TSW1400EVM J1 THS5671EVM J1 Pin 1 Pin1 Pin 3 Pin 3 Pin 5 Pin 5 “ “ Pin 27 Pin 27 Connect a couple of GND’s between the two boards TSW1400EVM THS5671EVM J1 Pin 2 Pin 2 Pin 4 Pin 4

Hardware setup

Test Setup: Single tone is given as input to the device. Data captured using HSDC Pro GUI Test conditions: LMK = Providing 491.52Msps Fs clock. Fin = 70MHz ADC using Mode 2, LPF with LMFS = 4421

Click on “OK” to connect to the TSW1400 Open HSDC Pro GUI. Click on “OK” to connect to the TSW1400

Click on “OK”. Next, click on the “DAC” tab in the upper right of the GUI.

The DAC display opens. Next click on the drop down arrow in the “Select DAC” window in the left side of the GUI,

Select “cmos”, as shown below.

Click on “Yes” to load the FPGA firmware on the TSW1400

Click on “Yes” to load the FPGA firmware on the TSW1400

Enter the DAC sample rate in the “Data Rate (SPS) window, set the DAC Option to “Offset Bin”, and setup up the test tone in the IQ Multi-tone Generator section of the GUI (bottom left). In this example, we are using a sample rate of 50MHz, and creating a single tone of 1MHz using 65,536 samples. The GUI will round this off based on the number of sample points used.

Click on “Send”. This will send a 997 Click on “Send”. This will send a 997.162KHz tone (shown below) to the DAC

Output tone from SMA J6. Note: You may have to delay the clock source either to the TSW1400 or THS5671EVM to get the data to meet setup and hold time at the DAC.