Pemrogramman VHDL 2 Data Type

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Presentation transcript:

Pemrogramman VHDL 2 Data Type Aqwam Rosadi Kardian

Pre Defined Data Type

BIT, BIT_VECTOR Two Level Logic : ‘0’ or ‘1’

BIT, BIT_VECTOR

STD_LOGIC & STD_LOGIC_VECTOR

STD_LOGIC ..........

STD_ULOGIC

Other Data Type

Example

Example – Legal/Ilegal ?

User Defined Data Type : Integer

User Defined Data Type : Enumerated

User Defined Data Type : Enumerated

Subtypes

Subtypes

Arrays

Arrays

Arrays

Arrays

Arrays

Arrays

Arrays

Arrays

Arrays

Port Arrays

Port Arrays

Port Arrays

Port Arrays

Records

Signed - Unsigned

Signed - Unsigned

Signed - Unsigned

Signed - Unsigned

Data Conversions

Data Conversions

Data Conversions

Data Conversions

Summary

Assignment

Terima kasih ! Merci ! Thanks you very much !