Technology Migration Technique for Designs with Strong RET-driven Layout Restrictions Xin Yuan, Kevin McCullen, Fook-Luen Heng, Robert Walker, Jason Hibbeler, Robert Allen, Rani Narayan April 5, 2005 ISPD 2005 April 5, 2005
Outline Introduction Review related work Our solution Experimental Results Conclusion and ongoing work ISPD 2005 April 5, 2005
Restrictive Design Rules (RDRs) [Liebmann et al SPIE 2004] Coarse grid Strong Resolution Enhancement Technique (RET)-driven design rules Require: Limited number of narrow linewidths Single orientation of narrow features Narrow features placed on uniform and coarse pitch Uniform proximity environment for all critical gates Limited number of pitches for critical gates dummy polysilicon ISPD 2005 April 5, 2005
Minimum Layout Perturbation (MinPert)-based Design Migration Design migration: key to achieve maximum layout productivity MinPert [Heng et al ISPD97]: fix all the design rule violations with minimum total perturbation of the layout Conventional migration techniques target for area and wirelength minimization (a.k.a. layout compaction) min M1 space CA to RX space violation Contact M1 Poly Diffusion Layout with design rule violation in new technology CA to RX space increased Tight neighbors are perturbed as needed Non min spacing and width are preserved Minimally perturbed layout with design rule violation removed CA to RX space increased spacing and width are squeezed to minimum compacted layout using min area and wirelength objective ISPD 2005 April 5, 2005
Minimum Layout Perturbation (MinPert)-based Legalization Constraint-based legalization Model layout rules constraints into a constraint graph G=(V, A) layout element Ei Node Vi V Rule constraints between layout elements arcs between nodes Vi Vj dij Vj(X) - Vi(X) dij Constraint graph G=(V,A), Linear constraint set Vi Vj Ground rule: diffusion overlap past poly by dij diffusion poly Location perturbation objective (LocPert): Linear programming problem formulation ISPD 2005 April 5, 2005
Minimum Layout Perturbation-based Design Migration for RDR constraints (MPRDR) Challenges: Discrete space constraints (grid constraints) A brand new problem, nobody studied it before It is a mixed integer linear programming (MILP) problem Not practical to use MILP solver Compaction with grid constraints was solved in 1987 by J. F. Lee et al Different objective and not applicable Our solution is an enhancement to the minimum layout perturbation-based technology migration technique proposed in 1997 ISPD 2005 April 5, 2005
Minimum Layout Perturbation-based Design Migration for RDR constraints (MPRDR) Problem Formulation Given constraint graph with out RDR constraint G=(V, A) of a layout, build augmented constraint graph G’ =(V, AARDRsARDRns) 2 3 6 1 4 5 7 ARDRns ARDRs Relax it to mixed integer linear programming problem (MILP) ISPD 2005 April 5, 2005
Our Solution: A two-stage Approach Stage 1: Compute the target grid position of gates to meet the grid constraints with MinPert flavor model gates and their neighborhood relationship as a directed graph called PC neighborhood graph (PCN-graph) Minimum perturbation-oriented placement algorithm PCSP to “place” nodes (gates) on pitch based on the PCN graph v1 v2 v3 v5 V4 v7 v6 v8 v10 v9 v12 v11 v14 v16 v13 v15 2 1 ISPD 2005 April 5, 2005
Our Solution: A two-stage Approach Stage 2: Treat the target grid positions of gates as design rules to be fixed by the minimum perturbation optimization For each gate Eig, given the target on-pitch location computed by PC placement algorithm T(Eig) wrt the cell left boundary position, denoted as Vlf(X), convert RDR constraints to a set of space constraint between the left boundary and the gates Left boundary Linear constraint to target location ISPD 2005 April 5, 2005
PCN-Graph 2 1 s t v1 v2 v3 v5 V4 v7 v6 v8 v10 v9 v12 v11 v14 v16 v13 t ISPD 2005 April 5, 2005
PC Shape Placement (PCSP): Algorithm Overview PCN-graph Estimate the range of possible valid grid positions of each node analyze the slack of target position based on PCN-graph Estimate the minimum width of the layout in terms of grids Place nodes with the least slack in topological order within their valid position range and close to the original positions as much as possible Update valid grid position and slack for unplaced nodes end ISPD 2005 April 5, 2005
Compute Slack on PCN-graph 3 4 2 12 8 10 6 14 16 11 17 18 19 ,6 ,19 ,17 ,16 ,14 ,12 ,10 ,11 ,8 ,4 ,18 ,13 ,5 ,3 ,2 ,0 v1 v2 v3 v5 V4 v7 v6 v8 v10 v9 v12 v11 v14 v16 v13 v15 2 1 s t Topological sorting on PCN-graph, {s, v1, v2, v3, v4, v5, v6 ,v7, v8, v9, v11, v10, v12, v13, v14, v15, v16,t} left(s) =0 , position source node at grid position of 0 Visit node vj in topological order, left(vj) = max {left(vi) + w(eij) }, for all eij Min_W = left(t), right(t) = max{target_W, min_W} , let w0 be the width of the given layout, scaler=right(t) / w0, for each node vi, old(vi) = old(vi)*scaler. Visit node vi in reversed topological order, right(vi) = min {right(vj) - w(eij) }, for all eij slack(vj) = right(vj) – left(vj) , ISPD 2005 April 5, 2005
PC Shape Placement (PCSP): Algorithm Overview PCN-graph Estimate the range of possible valid grid positions of each node analyze the slack of target position based on PCN-graph Estimate the minimum width of the layout in terms of grids Place nodes with the least slack in topological order within their valid position range and close to the original positions as much as possible Update valid grid position and slack for unplaced nodes end ISPD 2005 April 5, 2005
Experimental Results PC Shape Placement vs GLPK (a MILP solver) to solve Problem (4) in the first stage Test cases #var #cnst quality runtime PCSP GLPK test1 172 1035 1.02 0.01s 24h test2 347 1914 1.04 24h test3 535 2996 1.19 0.03s test4 715 3934 1.03 test5 1637 8997 ISPD 2005 April 5, 2005
Experimental Result (con’t) Before legalization After legalization ISPD 2005 April 5, 2005
Conclusion and Ongoing Work Study the problem of MPRDR Propose a two-stage approach to solve the MILP problem Propose the heuristic algorithm to compute target on-grid locations with minPert flavor Our solution works well on industrial layouts Ongoing works Handle hierarchical design Handle grid constraints on other layout objects ISPD 2005 April 5, 2005