Lab Find Live CMPUT 229.

Slides:



Advertisements
Similar presentations
1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Advertisements

Lecture 5: MIPS Instruction Set
The University of Adelaide, School of Computer Science
MIPS processor continued. Review Different parts in the processor should be connected appropriately to be able to carry out the functions. Connections.
1 Procedure Calls, Linking & Launching Applications Lecture 15 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.
1 Lecture 4: Procedure Calls Today’s topics:  Procedure calls  Large constants  The compilation process Reminder: Assignment 1 is due on Thursday.
Assembly Code Example Selection Sort.
The University of Adelaide, School of Computer Science
MIPS Function Continued
1 Nested Procedures Procedures that don't call others are called leaf procedures, procedures that call others are called nested procedures. Problems may.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /17/2013 Lecture 12: Procedures Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL.
Ch. 8 Functions.
Recitation Material of Engineering an Assembler June 11, 2013.
The University of Adelaide, School of Computer Science
Assembly Language II CPSC 321 Andreas Klappenecker.
ENEE350 Spring07 1 Ankur Srivastava University of Maryland, College Park Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005.”
Intro to Computer Architecture
Lecture 7: MIPS Instruction Set Today’s topic –Procedure call/return –Large constants Reminders –Homework #2 posted, due 9/17/
Computer Organization CS345 David Monismith Based upon notes by Dr. Bill Siever and notes from the Patterson and Hennessy Text.
MIPS function continued. Recursive functions So far, we have seen how to write – A simple function – A simple function that have to use the stack to save.
Procedures 2a MIPS code examples Making Use of a Stack.
Character Data and 32-bit Constants (Lecture #20) ECE 445 – Computer Organization The slides included herein were taken from the materials accompanying.
More Better Assembly CSCI 136 Lab 4. Soapbox Philosophy SAD TRUTH: THE TRIAL AND ERROR METHOD OF PROGRAMMING IS A WASTE OF TIME. Plan your program before.
Procedure (Method) Calls Ellen Spertus MCS 111 September 25, 2003.
April 23, 2001Systems Architecture I1 Systems Architecture I (CS ) Lecture 9: Assemblers, Linkers, and Loaders * Jeremy R. Johnson Mon. April 23,
Runtime Stack Computer Organization I 1 November 2009 © McQuain, Feng & Ribbens MIPS Memory Organization In addition to memory for static.
Lecture 4: MIPS Instruction Set
Computer Architecture CSE 3322 Lecture 4 crystal.uta.edu/~jpatters/cse3322 Assignments due 9/15: 3.7, 3.9, 3.11.
MIPS coding. Review Shifting – Shift Left Logical (sll) – Shift Right Logical (srl) – Moves all of the bits to the left/right and fills in gap with 0’s.
MIPS I/O and Interrupt.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /22/2013 Lecture 12: Character Data Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE.
EE 3755 Datapath Presented by Dr. Alexander Skavantzos.
Chapter 2 — Instructions: Language of the Computer — 1 Conditional Operations Branch to a labeled instruction if a condition is true – Otherwise, continue.
Computer Organization CS345 David Monismith Based upon notes by Dr. Bill Siever and notes from the Patterson and Hennessy Text.
Lecture 5: Procedure Calls
Computer Architecture & Operations I
Functions and the Stack
MIPS Procedures.
MIPS Coding Continued.
Lecture 4: MIPS Instruction Set
Design of the Control Unit for Single-Cycle Instruction Execution
Discussion Session Week 10
Computer Architecture & Operations I
Designing MIPS Processor (Single-Cycle) Presentation G
MIPS coding.
Instructions - Type and Format
Week 5 Computers are like Old Testament gods; lots of rules and no mercy. Joseph Campbell.
MIPS Procedures.
Solutions Chapter 2.
ECE232: Hardware Organization and Design
The University of Adelaide, School of Computer Science
Topic 5: Processor Architecture Implementation Methodology
Instruction encoding The ISA defines Format = Encoding
MIPS Functions.
Lecture 5: Procedure Calls
MIPS functions.
MIPS Procedures.
Review.
Topic 5: Processor Architecture
COSC 2021: Computer Organization Instructor: Dr. Amir Asif
MIPS function continued
MIPS Functions.
COMS 361 Computer Organization
MIPS Coding Continued.
MIPS coding.
MIPS Functions.
Week 5 Computers are like Old Testament gods; lots of rules and no mercy. Joseph Campbell.
MIPS function continued
Conditional Control Structure
MIPS Functions.
Presentation transcript:

Lab Find Live CMPUT 229

Liveness

Liveness Definition A register contains a value that is live if that value may be used by another instruction. Example: lui $t0, 0x8880 lw $t1, 0($t0) add $t3, $t1, $t2 {$t0} {$t1 , $t2} ?

Liveness Examples Another Example: lui $t0, 0x8880 lw $t1, 0($t0) add $t1, $t1, $t2 {$t0} {$t1 , $t2} ?

Liveness Examples (Control Flow) ∅ lui $t0, 0x8880 lw $t1, 0($t0) lw $t2, 4($t0) beq $t1, $t2, addOne {$t0} {$t0, $t1} {$t1, $t2} {$t1, $t2} {$t1, $t2} add $v0, $t1, $t2 j done ∅ addOne: add $v0, $zero, 1 {$v0} done: jr $ra {$v0}

When is a register dead?

$t0 is dead at this point if in every path that starts at this point $t0 is first redefined, or it does not appear in the path. $t0 1 $t0 $t1+1 $t0 does not appear in this path.

When is a register live?

$t0 is live at this point if in at least one path that starts at this point $t0 is used before it is defined $t0 is live in this path $t0 $t1+1 $t0 $t0+1 $t0 is used before it is defined

Control Flow Graphs

Control Flow Graph Example Loop: lw $t0 0($t7) beq $t0 $zero Done addi $t0 $t0 -1 addi $t7 $t7 4 j Loop Done: addi $v0 $zero 1 syscall jr $ra A A Do not know the value of $t0 Do not know the path B B C C Static Analysis

Instruction Parsing

How to find control flow instructions? Check the opcodes. To find jr $ra check both the opcode and the register value in the appropriate bitfield.

beq $t0 $t7 someLabel # $t0 == $t7 ? Branch instructions use registers. Thus, these I-type instruction must be parsed differently than other I-type instructions. beq uses both rs and rt 4 19 8 32 OpCode rs rt address beq $t0 $t7 someLabel # $t0 == $t7 ? addi uses rs and defines rt 8 19 32 OpCode rs rt address addi $t0 $t7 100 # $t0 = $t7 + 100

Some branch instructions use two registers and some only use one Some branch instructions use two registers and some only use one. Handle the different branch instructions appropriately.

In a store instructions (sw, sb and sh) both registers are a source: rt is not a destination as it is in other I-type instructions sw $t0 4($t2) # Mem($t2+4)  $t0 sw, sh, and sb instructions can be detected by their opcode.

A Proposed Live-Analysis Algorithm

Which registers are live at this point? LiveRegs? add $t0 $t1 $t2 Now we know that: $t0 is dead $t1 and $t2 are live beq $t3 $t0 skip Strategy: find out which registers are used by each instruction and mark those as live? live: [___,___,___,___,___,___,___,___] 1 1 1 1 $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 Using that strategy, we would now mark $t0 and $t3 as live. That is wrong!

We have finished the blue path and found that $t1, $t2 and $t3 are live. LiveRegs? add $t0 $t1 $t2 Now we have to follow the other paths. beq $t3 $t0 skip add $t4 $t1 $t2 beq $t1 $t4 done live: 1 1 1 [___,___,___,___,___,___,___,___] $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 dead: 1 1 [___,___,___,___,___,___,___,___] jr $ra $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7

is live in the green path. The issue is that $t4 was marked as dead in the blue path, but it is live in the green path. LiveRegs? add $t0 $t1 $t2 beq $t3 $t0 skip We need to save the dead list at each split point so that we have it when going down the other path. li $t0 1 add $t4 $t1 $t2 beq $t1 $t4 done live: 1 1 1 [___,___,___,___,___,___,___,___] $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 dead: 1 1 [___,___,___,___,___,___,___,___] jr $ra $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7

Because we need to save the dead list at each split point we will need to keep many copies. An easy way to do this is to keep a dead-list stack. At each split point: before following the first path duplicate the top of the stack before following the second path discard the top of the stack

Cycle Detection: A path that goes back Duplicate top of dead stack before proceeding from a split point. Cycle Detection: A path that goes back to a node already visited, in the same path, must terminate. LiveRegs? add $t0 $t1 $t2 beq $t3 $t0 skip We will introduce a visited marker later. Discard the top of the dead stack before proceeding to the other path. li $t5 1 add $t4 $t1 $t2 beq $t1 $t4 done live: 1 1 1 [___,___,___,___,___,___,___,___] 1 addi $t1 $t1 1 $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 j loop dead → 1 1 [___,___,___,___,___,___,___,___] jr $ra dead → [___,___,___,___,___,___,___,___] 1 1 1 [___,___,___,___,___,___,___,___] dead → 1 1 [___,___,___,___,___,___,___,___]

Duplicate top of knownToBeDead stack before proceeding from a split point. LiveRegs? add $t0 $t1 $t2 beq $t3 $t0 skip Discard the top of knownToBeDead stack before proceeding to the other path. li $t5 1 add $t4 $t1 $t2 beq $t1 $t4 done live: 1 1 1 [___,___,___,___,___,___,___,___] 1 addi $t1 $t1 1 $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 j loop jr $ra [___,___,___,___,___,___,___,___] 1 [___,___,___,___,___,___,___,___] dead → 1 1 [___,___,___,___,___,___,___,___]

Cycle Detection The algorithm will need to detect cycles otherwise it will go on infinite paths around loops. We suggest the use of a visited flag for each instruction. For correctness, once all recursions starting from a node are completed, the visited flag for that node needs to be cleared.

visited: LiveRegs? add $t0 $t1 $t2 beq $t3 $t0 skip li $t5 1 beq $t1 $t4 done addi $t1 $t1 1 j loop jr $ra visited: 1 1 1 1 [___,___,___,___,___,___,___,___,___] 1 1 1 1

Tips If you choose to use the globals that are suggested in the algorithm, you need to initialize them each time that you start analyzing the code of a new function. It is up to you to come up with a way to extract the registers from the binary instruction representation.

The Assignment ( findLive input) Memory This is the sentinel indicating the end of the program. $a0 $a0 contains a memory address At that address is the binary representation of the first instruction

The Assignment (findLive output) $v0: An address of a list of words stored in memory Each word in the list encodes in binary the set of registers that are live at a point after a jal instruction. The list is ordered by the address of the jal instructions. The list must contain the sentinel 0xFFFFFFFF as the last element.

The Assignment (findLive output) Each element of the returned list will follow the format below 1 Example: if $s0 and $t8 are the only live registers the binary pattern above should be returned.

Testing Test Cases Student-Generated Test Cases One test case is provided, under the link in the assignment specification Student-Generated Test Cases Students will submit test cases Printing the Output of your solution MIPS code provided for printing

University of Alberta Code of Student Behavior http://www.governance.ualberta.ca/en/CodesofConductandResidenceCommunityStandards/CodeofStudentBehaviour.aspx 30.3.2(1) Plagiarism No Student shall submit the words, ideas, images or data of another person as the Student’s own in any academic writing, essay, thesis, project, assignment, presentation or poster in a course or program of study. 30.3.2(2) Cheating 30.3.2(2) d No Student shall submit in any course or program of study, without the written approval of the course Instructor, all or a substantial portion of any academic writing, essay, thesis, research report, project, assignment, presentation or poster for which credit has previously been obtained by the Student or which has been or is being submitted by the Student in another course or program of study in the University or elsewhere