The LHCb Upgrade Per la Collaborazione LHCb U. Marconi, I.N.F.N. Bologna, CSN1 May 28th, 2012

Toward the “Framework TDR” The LoI upgrade submitted to LHCC by the beginning of March 2011. [CERN-LHCC-2011-001] Physics case fully endorsed and 40 MHz architecture reviewed. LHCC recommendation in June 2011 to proceed to detector TDRs, in time for installing the detectors and electronics in 2018. The LHCb Collaboration proposed to the LHCC to go for a “Framework TDR” aiming to: Convince our LHC machine colleagues that the HL-LHC will have to deal with at least 3 IPs. Ease the negotiations with our funding agencies. Proceed a.s.a.p. with the MoUs. The proposal has been very well received by the LHCC referees. The “Framework TDR” is ready and it is now a public document.

Content of “Framework TDR” 1st chapter. Introduction, explaining the evolution since the LoI (CERN-LHCC-2011-001), in particular with update on expected physics performance. Update on the evolution of the detectors requirements and main technical options. 2nd chapter. Update on the evolution of sub-systems R&D since the LoI. 3rd chapter. Time schedule. Cost. Declaration of interest of institutes. Subject to funding. CERN/LHCC 2012-007, LHCb TDR 12, 25 May 2012 https://cdsweb.cern.ch/record/1443882/files/LHCB-TDR-012.pdf

LHCb upgrade: main assumptions In the LoI LHCb declared its interest to upgrade the detector aiming to: Run LHCb at a “nominal luminosity" of L = 1.*1033 cm-2s-1. Exploit a fully flexible software trigger, selecting events at 40 MHz, synchronously with the BX clock. Increase of signal efficiency for leptonic channels by a factor 5 and for hadronic channels by a factor 10. Accumulate 50 fb-1 over 10 years. For reasons of flexibility and to allow for possible evolutions of the trigger, LHCb decided to design those detectors that need replacement for the upgrade such that they can sustain a luminosity of L=2*1033 cm-2 s-1.

Major milestones 2011: LoI (fully endorsed in June). Mid 2012: “Framework TDR”. 2012: Continue with R&D towards technical choices. 2012/13: Technical review and choice of technology. 2013: TDR and prototype validation. 2014: Tendering and serial production. 2016-17: Quality control and acceptance tests 2018: Installation

LHC 10 years plan

1 MHz L0 trigger rate limitation The present L0 trigger architecture 1 MHz L0 trigger rate limitation 1 MHz 3 – 4 kHz

LLT efficiency vs LLT output rate LLT-hadron LLT efficiencies Relative rates LLT-μ : LLT-hadron: LLT-e/γ = 1:3:1.

Running conditions Max input rate to the HLT of non empty events < 30MHz Rate: Number of colliding bunches × revolution frequency  LHCb: nb× f = 2622 × 11245 = 29.5 MHz Average pileup: μ := <pileup> = L × σpp / (nb × f) At L = 1. × 1033 cm-2s-1, μ = 2. Events with at least one interaction per crossing: At L = 1. × 1033 cm-2s-1 : 29.5 × (1. – exp(-2.)) = 26. MHz At L = 2. × 1033 cm-2s-1 : 29.5 × (1. – exp(-4.)) = 29. MHz

Trigger: the key to higher luminosity 40 MHz All the sub-detectors information to the readout at 40 MHz LLT pT of h,μ, e/γ Custom electronics 40 MHz Accept READ-OUT TELL40 Custom electronics Bandwidth presently limited to 1MHz FCTS LLT trigger rate 10 – 30 MHz 40 MHz HLT Tracking and vertexing pT and impact parameter cuts Inclusive/exclusive selections Event Filter Farm ~ 20 kHz

Readout at 40 MHz Data throughput from the FEE to the read-out boards (TELL40). 40. MHz × 4. (pileup) × 35. kB/evt ~ 45. × 1012 bit/s Number of GBT links: 45 × 1012 bit/s / 3.2 × 109 bit/s ~ 14000 links Current detector has already 8300 links installed. Number of TELL40 readout boards: ~ 200

TELL40 adaptable board 24 optical input per AMC mezzanine board Adaptable board to cover all the functionalities required by the timing, control, low level trigger and data acquisition systems. First prototype to be fully tested by end 2012

L L T Selection Board

The DAQ network Event Filter Farm The network as a modular system: split the network into several sub-networks. Each readout board is connected to all the sub-networks. Slice 1 Slice n Readout Board Readout Board Readout Board Readout Board Readout Board Readout Board ... Core Router 01 Core Router n Event Filter Farm Event Filter Farm SWITCH SWITCH SWITCH SWITCH SWITCH SWITCH SWITCH CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU 10G 40/100G 10/40G

Cost of the Event Filter Farm (HLT) slope ~ 560 kCHF/MHz 30 MHz maximum because of empty crossings. 2018 starting point 10 MHz. Il costo continene anche il building? minimum maximum Assuming the present HLT mean processing time of 20 ms/event. Cost of the present EFF running at 1 MHz: ~10 MCHF: A EFF which could sustain 30 MHz would cost nowadays ~24 MCHF.

Luminosity of 1033 cm−2s−1: average pileup of 2 HLT output rate to disk Luminosity of 1033 cm−2s−1: average pileup of 2 HLT output rate The HLT output rate to disk has to be of the order of 20 kHz

Tracking efficiency vs multiplicity

Detector modifications

The LHCb tracking system TT and IT are microstrips silicon detector. Pitch 200 μm, length 11, 22 and 33 cm. Outer tracker is a gaseous detector based on very thin (5 mm) and very long straw tube (2.4 – 5 m). Occupancy limited to 20 – 25% T Stations Outer Tracker Inner Tracker Trigger Tracker

Tracking upgrade Increased occupancy in the inner region of the tracking system 2∙1032 cm-2s-1 μ = 0.4 10∙1032 cm-2s-1 μ = 2 Note: LHCb have been running already at pileup μ ~ 2.5 The current geometry limiting to L ≤ 10∙1032 cm-2s-1 No safety margins. OT IT

“Central Tracker” with 250 μm SciFi Tracker options 250 μm Scintillating Fiber “Central Tracker” Silicon Strip Inner Tracker OT: Straws “Central Tracker” with 250 μm SciFi OT: Straws “large area” IT with Silicon Strips

Large area IT with Silicon strips Current IT Light & large area IT OT: Straws light IT: Silicon Strips Large area IT with Silicon strips Current IT Tape Automated Bond Effort started strip chip design cooling proof of concept (air flow) received 10 sensors for testing TAB, module assembly, HV, etc. Light & large area IT light: reduce X/X0 ~ 2 large: increase area by ~ 3-4 : from 126x22(42)cm to 255x42(63)cm Optimise station layout: now 3x(xuvx)=12 layers in-front of T3 to 2x(xuxvx)=10 layers behind T1 & T3

Fiber Central Tracker Advantages: 32 channels Si PM: 0.25 x 1 mm2 128 channels SiPM available CT: Scintillating Fibers 5 layers of densely packed 250μm diameter, 2×2.5m long fibres . Readout with 128-channel Silicon Photomultipliers (SiPM) located on top and at bottom of stations. Advantages: Only sensitive material in the acceptance: no cables, no cooling, ... Uniformity in material distribution. Hit resolution expected: 50-60 μm

VELO Upgrade Different systems of the current VELO will be retained: CO2 cooling plant LV and HV power supply systems Vacuum vessel and equipment Motion system. Major new components: Detector modules New readout ASIC Enhanced module cooling interface Low material RF foil between beam and detector vacuum. Multi Gb/s readout system Main design concerns: Efficient cooling to avoid thermal runaway Handle the huge data rate Reduce material budget Replace Proper time resolution ~ 50 fs IP resolution ~ 13 + 25/pT μm

VELO upgrade Pixels : A pixel upgrade based on a future version Velopix of the TimePix chip has been proposed. • The square pixel (55um x 55um, 256x256 pixels) results in equal spatial precision in both directions. • This removes the need for double sided modules. A pixel design results in much lower occupancies than a strip based solution. • Good HLT performance: VELO reconstruction 1.5 ms Strips : The current r-phi strip layout is a viable solution for the LHCb upgrade. This technology is well understood in the current detector. • Maintain low occupancies by reducing strip size. • Need to be able to common mode suppress, cluster and zero suppress on chip at 40 MHz A strip design results in a lower material budget than a pixel based solution. • HLT performance: VELO reconstruction 2.5 ms 26 modules equipped with hybrid pixel sensors, arranged around the beam axis, each consisting of four 3-chip pixel ladders assembled in an L-shaped arrangement on alternating sides of a diamond substrate, which acts as a cooling interface beam

VELO upgrade Aluminium alloy AlMg3 to Al 300 μm to be reduced Carbon fiber polymer CFRP 300 μm thick Based on experience with the current LHCb detector and LHC beams, it appears that several parameters which originally limited the minimum distance of approach of the RF foil material can be reconsidered. The beam positions are stable during physics data taking, the VELO positioning is precise and reliable, and the detector halves are accurately adjusted around the luminous region at each and every fill. Preliminary considerations indicate that the current inner foil radius of 5.5 mm could be reduced to less than 4 mm, perhaps as low as 3 mm. This, potentially, would allow the inner radius of the sensitive area of the silicon sensor to be reduced from the current 8.2 mm to 7 mm, perhaps even 6 mm, which would have a major impact on the LHCb physics preformance, owing to the improved impact parameter resolution. Effort has been started to assess all consequences and benets of such a radius reduction. The minimal distance of the sensor from the interaction point and the thickness of RF-foil are critical for the performance of the VELO detector.

RICH upgrade RICH-1 and RICH-2 detectors are retained. Replace pixel HPDs photon detector due to the 1 MHz integrated the readout chip. MaPMTs with new external 40 MHz readout electronics is the baseline readout: CLARO-CMOS vs ATLAS 40 MHz Maroc-3. Remove the aerogel radiator: due to low photon yield and the expected increase of the background. The area of RICH-1 to be covered with the upgraded photo-detectors can be significantly reduced: about half of the photo detector area of RICH-1 is currently devoted to the aerogel radiated photons. Without aerogel LHCb can still distinguish between light and heavy particles within 1 < p < 10 GeV/c using RICH-1 in veto mode: the Cherenkov threshold in C4F10 is 2.6 GeV/c for π and 9.3 GeV/c for K. 

RICH upgrade R7600 vs R11265 (baseline): 8x8 pixels, 2.0x2.0 mm2, 2.3 mm pitch (2.9 mm) 18.1x18.1 mm2 active area (23.5x23.5 mm2) CE (simulation) : 80% (90%) Fractional coverage: 50% (80%) Prototyping using 40 MHz Maroc-3 RO chip: Gain compensation Binary output Digital functions in ACTEL Flash FPGA FE module. R7600 characterization: Channel to channel gain variation (correction in FE) Excellent cross-talk (below 1%) ~10% gain reduction in 50 gauss BL-field (25 gauss max BL-field in LHCb) 3712 R7600/R11265 units for RICH1&2 ~238k #

Calorimeters Upgrade New digital electronics prototype ASIC prototype ECAL and HCAL remain Keep all modules & PMTs Radiation tolerance of inner modules being assessed @ LHC tunnel Reduce the PMTs gain by a factor 5 to keep same <current> PS and SPD might be removed (under study) (e/γ/hadron separation later in HLT with the whole detector info.) New FEE to compensate for lower gain and to allow 40 MHz readout: Analogue part: ASIC or Discrete* components solutions (keeping noise ≤1 ADC cnt (ENC < 5-6 fC)) Digital part: prototype board to test FPGAs (flash/antifuse) for: Radiation tolerance Packing of Data @ 40 MHz New digital electronics prototype ASIC prototype

MUON detector Il sistema di readout del rivelazione MUON dev'essere certamente aggiornato per operare a 40 MHz. Il costo riportato nel documento FTDR si riferisce alle sole spese necessarie per effettuare l'adeguamento del sistema di readout, senza modifiche dei rivelatori né dell'elettronica di lettura (FEE). La capacità del rivelatore di operare efficacemente alla luminosità nominale di upgrade di  1.*10^33 cm-2s-1 non è garantita: Il MUON detector è stato progettato per operare a 2.*10^32 cm-2s-1 e per sostenere fino a 5.*10^32 cm-2s-1. La valutazione delle prestazioni del rivelatore alla luminosità nominale di upgrade richiede da parte nostra ulteriori approfondimenti. Gli studi in corso, per valutare i limiti di funzionamento del rivelatore ad alta luminosità per l'upgrade, mirano inoltre a comprendere quali modifiche sarebbero da apportare al rivelatore perché esso possa operare efficacemente a  2.*10^33 cm-2s-1, considerati costi e benefici.

Expressions of interest Expressions of interest to the detector construction, subject to funding.

Interests to sub-systems Common fund part amounts to ~ 30%

Total cost The overall cost of the LHCb upgrade varies with the choice of the sub-system technology. The core cost of the experiment including the pixel solution for the VELO and an Inner Tracker amounts to 53.4 MCHF, while a choice for the VELO strip and a Central Tracker will reduce the overall cost only slightly to 51.3 MCHF. For those detectors where only the readout and electronics have been affected by the upgrade, i.e. the RICH, Calorimeter and MUON systems, we foresee an additional reserve of 3.5 MCHF in order to account for possible modifications of some of the detector elements to comply with a luminosity of L = 2×1033cm-2s-1. Including this reserve, the total upgrade cost amounts to 57 MCHF. I.N.F.N. contribution FTE ~15%.

Richieste alla CSN1 per il 2013 Fondi per R&D per il prossimo anno. Accantonamento di fondi per contributi alle spese per Common Project: Contributo alla costruzione TELL40: strategico.

Sensitivity to key channels