Overview Introduction Logic Gates Flip Flops Registers Counters Review of Basics of Digital Electronics 1 Lecture 1 Overview Introduction Logic Gates Flip Flops Registers Counters Multiplexer/ Demultiplexer Decoder/ Encoder CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Block diagram of a digital computer Review of Basics of Digital Electronics 2 Lecture 1 Introduction Digital Computer A computer that stores data in terms of digits (numbers) and proceeds in discrete steps from one state to the next Binary digits The states of a digital computer typically involve binary digits. A binary digit is called a bit RAM CPU O/P Device I/P Device IOP Block diagram of a digital computer CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Logic Gates Review of Basics of Digital Electronics 3 Lecture 1 X X = (A + B)’ B Name Symbol Function Truth Table AND A X = A • B X or B X = AB 0 0 0 0 1 0 1 0 0 1 1 1 0 1 1 1 0 1 OR X X = A + B I A X X = A’ 0 1 1 0 Buffer A X X = A A X 0 0 1 1 NAND X X = (AB)’ 0 0 1 0 1 1 1 0 1 1 1 0 NOR 0 1 0 1 0 0 XOR Exclusive OR A X = A  B X or B X = A’B + AB’ 0 0 0 A X = (A  B)’ B X = A’B’+ AB 1 1 1 XNOR Exclusive NOR or Equivalence A B X A X A B X CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Review of Basics of Digital Electronics 4 Lecture 1 Flip Flops Characteristics - 2 stable states - Memory capability - Operation is specified by a Characteristic Table The Storage elements employed in clocked sequential circuits, capable of storing one bit of information, are called Flip Flops The most common types of flip flops are SR (Set Reset) D (Data) JK T (Toggle) CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Edge Triggered Flip Flops Review of Basics of Digital Electronics 5 Lecture 1 Clocked Flip Flops In a large digital system with many flip flops, operations of individual flip flops are required to be synchronized to a clock pulse. Otherwise, the operations of the system may be unpredictable. Clock pulse allows the flip flop to change state only when there is a clock pulse appearing at the c terminal (as shown in fig). S Q S Q c c R Q’ R Q’ operates when operates when clock is high clock is low Edge Triggered Flip Flops State transition occurs at the rising edge or falling edge of the clock pulse CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Flip Flops Review of Basics of Digital Electronics 6 Lecture 1 GraphicalSymbol Characteristic Table SR (Set Reset) D (Data) S Q c R Q’ S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) D Q(t+1) 0 0 1 1 J Q C K Q' CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Flip Flops Review of Basics of Digital Electronics 8 Lecture 1 GraphicalSymbol Characteristic Table J-K T (Toggle) J Q C K Q' S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) J K Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 Q’(t) J Q c R Q’ T Q(t+1) 0 Q(t) 1 Q’(t) T Q c CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

S-R flip flop :

D flip flop :

J-K flip flop :

T flip flop :