FLIPPED CLASSROOM ACTIVITY CONSTRUCTOR – USING EXISTING CONTENT

Table of Contents SECTION SLIDE # 4 8 18 ABOUT YOU 3 OUT-OF-CLASS SEGMENT 4 IN-CLASS SEGMENT 8 EVALUATION 18

Final Year UG Students in Electronics Engineering Shilpa Rudrawar CMOS Inverter VLSI Design Electronics Final Year UG Students in Electronics Engineering MITAOE, Alandi Pune

Out-of-class Activity Design-1 Learning Objective(s) of Out-of-Class Activity At the end of watching the videos student should be able to Explain operation Inverter with connection of N-Channel and P-Channel device (Understand Level) Elaborate the DC transfer curve of the CMOS inverter (Understand Level) Key Concept(s) to be covered The N-Channel and P-Channel connection DC transfer curve

Out-of-class Activity Design - 2 Main Video Source URL http://www.ewebpal.org/143e.htm License of Video CC-BY-NC-SA (reuse allowed) Mapping Concept to Video Source CONCEPT VIDEO SEGMENT DURATION (in min) The N-Channel and P-Channel connection V1 - 0:00 – 3:10 3.10 DC transfer curve V2 - 3:10– 7.28 4.18 TOTAL DURATION 7.28 min

Out-of-class Activity Design - 3 Aligning Assessment with Learning Objective Learning Objective Assessment Strategy Expected Duration (in min) Additional Instructions (if any) Elaborate the DC transfer curve of the CMOS inverter (Understand Level) Q1. Draw and explain the VTC curve of CMOS inverter . 10 minutes Watch V1 and then answer Q1

Out-of-class Activity Design - 3 Aligning Assessment with Learning Objective Learning Objective Assessment Strategy Expected Duration (in min) Additional Instructions (if any) Explain operation of Inverter with connection of N-Channel and P-Channel device (Understand Level) Q1. Draw the CMOS inverter circuit diagram and explain its operation? 10 minutes Watch V2 and answer Q1 Total activity duration 20 minutes

In-class Activity Design -1 Learning Objective(s) of In-Class Activity At the end of the class, students will be able to, Implement any combinational logic using CMOS logic. (ANALYZE Level) Key Concept(s) to be covered Pull up and pull down network

In-class Activity Design -2 Active Learning activity that you plan to do Real world problem solving using. Think-Pair-Share Pull up and pull down network concept clarification using. Peer Instruction

In-class Activity Design -2 Peer Instruction Strategy – What Teacher Does Pose the two PI questions at the start of the class and provide summary of Pull up pull down concept. Q 1: What will happen if the position of NMOS and PMOS exchanged in CMOS inverter? No effect on output Output will be complement of input.  Output is improper with weak ‘0’ and weak ‘1’

In-class Activity Design -2 Peer Instruction Strategy – What Teacher Does  Q 2: Which statements are true from the following? PMOS passes strong ‘1’ and weak ‘0’ PMOS passes strong ‘0’ and weak ‘1’ NMOS passes strong ‘0’ and weak ‘1’ NMOS passes strong ‘1’ and weak ‘0’

In-class Activity Design -2 Peer Instruction Strategy – What Student Does For each question they will think individually and finalize their answer. Then they will interact with the other students about possible answer and come to consensus. Listen to the instructors explanation.

In-class Activity Design -2 TPS Strategy – What Instructor does First provide a premise In a chemical process, it may be desired that an alarm be activated whenever the process temperature exceeds a maximum value or whenever the pressure goes above a certain limit. The temperature transducer circuit produces an output voltage proportional to the process temperature. This voltage, VT, is compared with a temperature reference voltage, VTR, in a voltage comparator circuit. The comparator output, TH, is normally a low voltage (logic 0), but it switches to a high voltage (logic1) when VT exceeds VTR, indicating that the process temperature is too high. A similar arrangement is used for the pressure measurement, so that its associated comparator output, PH, goes from LOW to HIGH when the pressure is too high.  Which type of logic gate can perform this operation?

In-class Activity Design -2 TPS Strategy – What Instructor does Think (~2 minutes) Instruction: Assume comparator output TH, is normally a low voltage (logic 0), but it switches to a high voltage (logic1) when VT exceeds VTR. Assume same for PH. Think individually and identify the scenario (Boolean expression)

In-class Activity Design -2 TPS Strategy – What Instructor does Pair (~5 minutes) Instruction: Form the pair and compare your answers among them . Come up with the final answer. Now think on the problem statement and find which gate is required to generate output TH and PH ,develop a Boolean expression/gates to activate the Alarm output. Instructor will monitor the classroom ,and keep eye on all the students weather everyone actively participating in activity . TH PH ALARM 1

In-class Activity Design -2 TPS Strategy – What Instructor does Share (~8 minutes) Instructor asks Every group to explain and share their answer which they feel correct. After sharing is done, instructor gives feedback on the correct solution

In-class Activity Design -2 Justify why the above is an active learning strategy In both the above strategies, students are required to think logically on which logical gate can be used to implement the problem statement .

EVALUTION Rubrics for activity Parameters Good Satisfactory Needs Improvement Maximum Marks Resemblance to problem statement Interpreted the problem statement correctly (4 marks) Interpreted the problem statement partially (1-3 marks) Not Interpreted the problem statement. (0 marks) 4 Implementation of Logic diagram /circuit diagram Implemented the problem statement correctly (5 marks) Implemented the problem statement partially (1-4 marks) Not Implemented the problem statement. 5 Truth table Drawn correctly (2 marks) Drawn partially (1 marks) Not drawn (0 marks) 2