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Presentation transcript:

Input/Output 1 1

Device Controllers Figure 3-2. A model for connecting the CPU, memory, controllers, and I/O devices. 2 2

I/O Strategies CPU – managed I/O Co-processor – managed I/O CPU is directly involved in I/O transfers Co-processor – managed I/O CPU hands off I/O transfer to co-processor(s) Port-mapped I/O Special address space/instructions for I/O ports (e.g., PDP-8) May or may not be CPU-controlled Channel I/O Special address space/instructions for channels (e.g., IBM-360) Co-processor manages channel(s) Memory-mapped I/O I/O controllers are accessed in same address space as memory I/O memory acts funny 3 3

Memory-Mapped I/O Figure 3-3. (a) Separate I/O and memory space. (b) Memory-mapped I/O. (c) Hybrid. 4 4

Direct Memory Access (DMA) Figure 3-4. Operation of a DMA transfer. 5 5

Goals of the I/O Software Figure 3-5. Layers of the I/O software system. 6 6

Device-Independent I/O Software Figure 3-6. Functions of the device-independent I/O software. 7 7

Uniform Interfacing for Device Drivers Figure 3-7. (a) Without a standard driver interface. (b) With a standard driver interface. 8 8

User-Space I/O Software Figure 3-8. Layers of the I/O system and the main functions of each layer. 9 9