Energy Efficient Computing in Nanoscale CMOS

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Presentation transcript:

Energy Efficient Computing in Nanoscale CMOS Vivek De Intel Fellow Director of Circuit Technology Research Intel Labs

Internet of Everything (IoE)

Moore’s Law scaling

Dynamic platform control

Near Threshold Voltage (NTV) computing

NTV IA processor

NTV design techniques

NTV IA – powered by solar cell!

Power performance measurements

Power components

Minimum energy operation

NTV and variability

Voltage-frequency margins

Dynamic adaptation & reconfiguration

Dynamic V & F adaptation

Resilient platforms

Resilient & adaptive core

Performance & efficiency gains

Integrated voltage regulators

Fully integrated VR

Energy efficient interconnects

Memory capacity & bandwidth

Efficient & scalable neuromorphic systems

Efficient & scalable neuromorphic architecture

Efficient information encoding

Information capacity scaling

Sparsity vs. efficiency

Neuron models & building blocks

Neurosynaptic plasticity for learning

Multiple learning modes via spike timing

Multi-scale synaptic plasticity

Efficient & scalable neurosynaptic network

Distributed memory + compute

Neuromorphic computing futures

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