CSCE330 Computer Architecture Dr. Khaled El-Ayat 1/14

٣٠/٦/٢٠١٣ ١٥/١١/١١ الشيخ عماد عفت ١٥/١١/١١ علاء عبد الهادى ٢٥/١/١١ أنا إن قدر الإله مماتى           لا ترى الشرق يرفع الرأس بعدى إننى حرة كسرت قيودى               رغم أنف العدا وقطعت قيدى مصر التى فى خاطرى وفى دمى أحبها من كل روحى ودمى 1/14

Course--Overview “See the forest from the trees” Technology & Computer Architecture Review: MIPS instruction set architecture--, CISC vs. RISC ... (Chapter 2) Computer Arithmetic, ALU design (Appendix C5,6) [Lab] CPU Datapath and Control (Chapter 4) [Lab] Pipelining (Chapter 4) [CPU simulator project] Memory Hierarchy: Cache, virtual memory (Chapter 5) Advanced Pipelining concepts, Multiprocessing, Multi-core technology remind me to 1/14

Prerequisite Knowledge Basic machine (CPU) organization processor, memory, I/O ; CSCE 231 Read and write C / C++/Java programs Read and write in an assembly language; CSCE 231 Logic design Fundamentals; CSCE 230 NOTE: Must take CSCE 339 this semester!! 1/14

Computing Devices Now Set-top boxes Sensor Nets Games Cameras Airbus Media Players Honda’sAsimo Servers Routers Laptops Smart phones Automobiles Supercomputers 1/14

Google Driverless Prius Granted U.S. patent — in its march to develop autonomous cars. "Transitioning a Mixed-mode Vehicle to Autonomous Mode." technologies that enable autonomous driving: radar, video cameras and lasers. Logged 140k miles testing in California / Nevada Autonomous driving law adopted in Nevada 1/14

ARM Smart Phone 1/14

Desktop or Laptop 1/14

Optical Mouse in action Optical mice illuminate work surface with LED, to reveal microscopic pattern of highlights and shadows. Patterns are reflected onto navigation sensor, which takes pictures at a rate of 1500 images per second. 1/14

Optical Mouse Image processing The Navigation Engine identifies common features in sequential images to determine the direction and amount of mouse movement. Image B was taken while the mouse was moving, a short time after image A. It shows the same features as image A, only shifted down & to the left. 1/14

Internet Routing 216.27.61.137 IP address Internet ? Routing http://static.howstuffworks.com/flash/router-inet.swf Routing http://static.howstuffworks.com/flash/router-lan.swf 216.27.61.137 IP address 1/14

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Parallel computing, security, … Domain of recent computer architecture Architecture:: Abstraction Layers in Modern Systems Application Algorithm Original domain of the computer architect (‘50s-’80s) Programming Language Reliability, power, … Parallel computing, security, … Reinvigoration of computer architecture, mid-2000s onward. Operating System/Virtual Machine Domain of recent computer architecture (‘90s) Instruction Set Architecture (ISA) Microarchitecture Gates/Register-Transfer Level (RTL) Circuits Devices Physics 1/14

Operating System 1/14

How Computer Handles Code temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) 00000000101000010000000000011000 ....... (MIPS binary machine program) High level language program Compiler Assembly language program Assembler Machine language program 1/14

Computer Basic Components Since 1946 all computers have 5 components Architecture: the manner in which the components of a computer system are organized See The Big picture Processor Control Datapath Memory Input Output In terms of the overall picture, by now we have covered all 5 components of the computer. Today we will talk about how to interface the I/O devices to the processor and memory via busses and the OS software. Next Wednesday, we will show you how multiple computers can be connected together with a network through the I/O devices. +1 = 5 min. (X:45) 1/14

Instruction Set Architecture Interface b/w the hardware & lowest level software includes anything a programmer needs to know to make a binary machine language work An implementation: hardware that obeys the architecture abstract An architecture can have several different implementations Modern instruction set architectures: 80x86/Core duo, Power (IBM), MIPS, SPARC, HP Application software system software Hardware 1/14

MIPS R3000 Instruction Set Architecture Registers Instruction Categories Load/Store Computational Jump and Branch Floating Point Memory Management Special Addressing Modes R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rt rd sa funct OP rs rt immediate OP jump target MIPS used this semester to explain architecture 1/14

Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Cleverness History/Applications matters because 1) People buy computers to run programs 2) Most people don;’t write own programs 3) Documented IDA interface means people ship binary machine code Operating Systems Power History 1/14

Nanotechnology advancements 1/14

IC Manufacturing: How a Core Duo is made Silicon ingot Blank wafers Patterned wafers 20 to 30 processing steps Tested packaged dies Packaged dies Tested dies Individual dies (one wafer) Slicer Dicer Die tester Ship to customers 1/14

Evolution of Microprocessors 1970-1980 1980-1990 1990-2000 2000-2013 Transistor count 2K-10K 100K-1M 1M-100M 100M-5B Clock Frequency 0.1-3Mhz 3-30Mhz 30M-1Ghz 1-3GHz Instruction per cycle < 0.1 0.1-0.9 0.9-1.9 1.9-2.9 CMP –Chip Multiprocessors a.k.a Multicore exist since 2001; Now mainstream – laptops, servers, smartphones, .. 1/14

NASA mainframe in 1969 Moon landing less powerful than today’s PC 1/14