Project Owyhee Digital Lock Team Jessica Rice Julie Barton-Smith Cory Johnson Advisor Dr. Inan, Dr. Osterberg Industry Representative Mr. Wes Mickanin November, 2005 University of Portland School of Engineering

Overview Introduction Scorecard Additional Accomplishments Plans Issues/Concerns November, 2005 University of Portland School of Engineering

Introduction Digital lock Block Diagram On MOSIS chip Keypad entry with key override Block Diagram November, 2005 University of Portland School of Engineering

Introduction ctd. November, 2005 University of Portland School of Engineering

Scorecard Establish Testing Protocol Test Logic & Debug Logic Design Series of 6 tests Right and Wrong Codes Door Open 2 Wrongs Make a Right Test Logic & Debug Logic Design Ran Command File It Worked! November, 2005 University of Portland School of Engineering

Scorecard ctd. Begin Design of Macro-model Update Website Discussed Using CPLD’s Use 6 Functional Blocks Update Website Formalize Project Plan Change Request Approved November, 2005 University of Portland School of Engineering

Additional Accomplishments Acquired electric latch and door knob Sent in chip 2 days early Teleconferenced with Dr. Osterberg November, 2005 University of Portland School of Engineering

Plans Finish designing macro-model Design Approval Meeting Order Parts November, 2005 University of Portland School of Engineering

Integrate with Macro Model Milestones Number Description Original Previous Present 10.24.05 11.08.05 11.10.05 1 Product Approval 10.12.05 2 Plan Approval 10.25.05 3 Design Release 12.06.05 4 Chip out 11.23.05 5 Macro Model Built 01.24.06 01.26.06 6 Lock Built 7 TOP's Approval 02.14.06 8 Integrate with Macro Model 02.28.06 03.02.06 9 Integrate with Chip 03.24.06 03.31.06 10 Prototype Release 04.04.06 11 Founder's Day 04.07.06 04.11.06 12 Final Report 04.25.06 04.28.06 November, 2005 University of Portland School of Engineering

Concerns/Issues Hardware Interface with MOSIS Chip Re-Learning ABEL Not Being in Same State Over Break November, 2005 University of Portland School of Engineering

Conclusions Introduction Scorecard Additional Accomplishments Plans On Chip Digital Lock Scorecard All finished except Macro-model Design Additional Accomplishments Sent Out Chip Early Plans Macro-model Issues/Concerns Interfacing with chip November, 2005 University of Portland School of Engineering

Questions? November, 2005 University of Portland School of Engineering