CMS SLHC Calorimeter Trigger Upgrade, ECAL Off-detector Upgrade at SLHC J. Varela LIP, Lisbon CMS SLHC Calorimeter Trigger Upgrade, U. Wisconsin,Thursday 29 November 2007

Motivations SLHC high luminosity implies a huge number of p-p collisions (up to 400) Higher ECAL occupancy results in increased ECAL data volume and data readout bandwidth Integration of ECAL TPGs in new trigger system is required Improved integration of ECAL trigger and readout paths should be attempted

ECAL occupancy p-p minimum bias collisions at sqrt(s)=14 TeV: ~ 5 0 per rapidity unit <PT> ~500 MeV SLHC up to 400 p-p collisions per crossing crossing rate 20 MHz Per Trigger Tower (. ~0.1 x 0.1), per crossing : ~ 12  ( rate in ECAL ~2.4 MHz/cm2) <PT> ~3 GeV No empty ECAL towers!

Trigger rates L1 e/ trigger: QCD background rates At LHC low luminosity (L=1033cm-2s-1) ~ 1 p-p collision per crossing Rates Prob/collision GeV No cuts (kHz) H/E+isol ET>20 10 3 2.5 10-4 7.5 10-5 ET>30 0.5 1.3 10-5 ET>50 0.06 1.5 10-6 Rates GeV No cuts (kHz) H/E+isol ET>20 2000 600 ET>30 100 ET>50 12 At SLHC (L=1035cm-2s-1), assuming prob/collision x 400  (cuts are probably less efficient)

Electron & photon measurement Moliere radius ~ crystal size ~ 100% of shower energy is contained in 3x3 crystal window (when no electron radiation or photon conversion) Average pile-up energy in 3x3 window: ~2 0  <ET> ~ 1 GeV ;  (ET) ~ <ET> ~ 1 GeV For non-converted photons of ET=50 GeV:  (pile-up) ~ 2%  (ECAL) < 1% Energy resolution is dominated by pile-up. Preshower could allow to identify individual pile-up photons Is the tracker material at SLHC an issue?

ECAL data volume At LHC: Total event size per DCC (FED): 40 kBytes After data reduction in DCC: 2 kBytes  average output bandwidth ~ 200 MB/s, for L1A=100 kHz Data filtering: Selective readout + zero suppression SR: read trigger tower with ET>2-3 GeV + 8 surrounding towers (225 crystals) At SLHC: Increase the SR thresholds at the expense of physics or Increase the data bandwidth We assume full event readout and L1A max=100 kHz  bandwidth 4 GBytes/s / DCC

ECAL Off-detector electronics L1A ON-DETECTOR Timing, Control & L1A Trigger primitives TRIGGER Xtal Data D C S T … OFF-DETECTOR Controller VME DAQ

ECAL Data Concentrator Card 40 cm Deserializers/ Input Handler Merger Evt Builder Spy Mem S-Link64 TCC Channels QPLL/Ref Clk Fanout Optical Receivers ECAL Backplane Stiffness bars SRP Link VME 72 Input Optical Links @ 1 Gbit/s Data collection and merging Data suppression by a factor ~ 20

ECAL TCC & SLBs 72 Input Optical Links @ 1 Gbit/s Trigger Primitives Links to RCT: 4x 1.2 Gbits/s per SLB 9 SLBs Trigger Concentrator Card (TCC68) Synchronization Link Board (SLB)

Upgrade directions Re-design DCC  higher data rate : 40 Gbit/s or 8 x 5 Gbits/s output links to DAQ Re-design TCC  better integration with trigger system (see Jose’s talk) DCC and TCC: same board, different firmware Further integration? Constraints: Keep FE electronics and link granularity FE trigger & data use the same physical link Tx: GOL+ NGK VCSEL Rx: 12 ch NGK receiver (obsolete) Possibilities: re-built GOH with new radhard optical link and new Rx or use present Tx with replacement for NGK Rx

ECAL Trigger/Readout Board Input links: Trigger barrel (per SM): 68 Trigger endcap (per 20o sector): 88 max Data barrel (per SM): 68 Data endcap (per 80o sector): 72 max  use 8 x 12 ch Rx = 96 input links (detector trunk cable capacity) Output links: Data: requires 8 links 5 Gbit/s Trigger: requires 9 links 5 Gbit/s  use 12 x 5 Gbit/s output links Processing: FPGAs

Conclusions ECAL Frontend processing (TPGs and readout) is adequate for SLHC Upgrade of FE links could be considered (new GOH mezzanine) Common ECAL Trigger/Readout board (barrel and endcap) seems possible Around 120 boards would be needed (presently ~160 boards) Each board communicates with DAQ and Trigger via 12 “CMS standard” 5 Gbit/s links