Low Voltage Power Supply & Power Controller Board Peter Berg University of California - Berkeley

Overview Overview Requirements Specification Design Mass and Power Test Schedule Issues

Overview CHANGES SINCE PDR FREQUENCY OF PWM SUPPLIES CHANGED TO 200KHZ ACCOMODATION FOR MSK INRUSH CURRENT

Design Drivers SUPPLY DESIGNED TO RBSP_EFW_LVPS_001 INPUT IS 28 VOLT POWER (22-35 VOLTS NOMINAL) PRIMARIES ARE CURRENT LIMITED SUPPLIES SYNCHRONIZED TO 799KHZ FLOATING SUPLIES RUN AT 399.5KHZ, OTHERS AT 199.75KHZ SUPPLY IS SOFT STARTED TO MINIMIZE TURN-ON STRESSES – INPUT CURRENT CONTROLLED REGULATION – 1% ON DIRECTLY REGULATED VOLTAGES AND 5% ON AUXILLARY VOLTAGES ISOLATED SECONDARIES BEB OUTPUTS INDEPENDENT OF IDPU OUTPUTS  225V SUPPLY AND FLOATING  15V SUPPLIES FILTERED TO 14μV RMS 10Hz-10KHz, AND 0.4μV RMS 10KHz-100KHz

Requirement Body or Section Heading Requirements ID Req. Title Subject Priority Requirement Body or Section Heading Implementation EFW-61 EFW Power Control Each EFW IDPU shall contain circuitry to open SPB and AXB doors and deploy sensors Implemented on PCB portion EFW-62 EFW Low Voltage Conversion contain circuitry to provide voltages to IDPU boards using the S/C-provided 28Volts Impemented using PWM converters EFW-63 EFW Main Power Allocation Each EFW Suite not exceed the total power of 11.16 W from the EFW Main 28V Service Verified on Flight Unit EFW-64 EFW Main Power In-Rush Each IDPU not exceed ICD values as follows: 10A for 100 usec; 5A for 100us to 1ms 2.5A after 1ms Implemented using soft start EFW-65 EFW Main Power Max Voltage tolerate without damage a maximum input voltage of 40V indefinitely as defined in the ICD Parts sufficiently derated EFW-75 EFW IDPU Operational Temp Range The EFW IDPU perform as designed from -25 to +55C Parts chosen are -55 to 125C EFW-78 EFW IDPU Survival Temp Range survive without damage from -30 to +60C EFW-88 EFW IDPU ICD Compliance comply with the requirements and constraints imposed by all relevant instrument-to-spacecraft interface control documents (ICDs). Verified by Instrument CPT EFW-98 EFW Illegal Power States not be damaged by the application of boom power while the Main power is Off. By design, verified by test EFW-99 EFW SPB Deployment Enable not deploy SPB booms or fire SPB actuators without the SPB and Main power ON.

Requirements EFW-100 EFW AXB Deployment Enable The EFW IDPU shall not deploy AXB booms or fire AXB actuators without the AXB and Main power ON. By design, verified by test EFW-101 EFW Boom Pair Redundancy have separate supplies for each preamp boom axis. By design EFW-102 EFW Safing by subsystem continue to provide EMFISIS with E-Field signals on failure of DCB or DFB EFW-131 EFW Initial Power On/Reset State power up in a nominal condition for measuring E-Fields without processor intervention. EFW-133 EFW Compliance with EM Environment Control Plan The EFW Suite comply with the requirements and constraints imposed by the RBSP Electromagnetic Environment Control Plan, APL document no. 7417-9018. Verified by Instrument CPT and EMC test EFW-136 Instrument Compliance with Environmental Design and Test Requirements Document Each EFW Instrument comply with the requirements and constraints imposed by the RBSP Environmental Design and Test Requirements Document, APL document no. 7417-9019. Verified as per RBSP_EFW_TE_001 EFW-137 EFW Quality Assurance comply with the RBSP Performance Assurance Implementation Plan, as modified by the Compliance Matrix Verified as per RBSP_EFW_PA_010

Specifications Electro-Mechanical Specifications Connectors ENCLOSURE KA80.1/127CPFC10TABH Mate/Demate Cycles >500 Allows use of commercial backplanes for testing Front Panel 9 Pin Male, 62 Pin Female ENCLOSURE Spacing is .75” above, .25” below Electrically shielded

Design

Design Packaging

Design

Design Design Considerations Grounds Voltage Capabilities 2 Digital 2 Analog 6 Floating Voltage Capabilities Worst Case Floating Voltages  240V Primary to Secondary Isolation >1000V Current Capabilities Worst Case Current Req – Actuators @ 2.25A Pin Capabilities – SDD Series: 5 amps nominal

Design SAMPLE PWM REGULATOR TO FLOATING SUPPLIES

Design MKS INRUSH MITIGATION MSK INRUSH MITIGATION TIMER

Design DUAL  FLOATING SUPPLY

Floating Supply Testing Design Floating Supply Testing

Design Power Control Section BYTE 1 MHZ LATCHES CMD CLEARS DECODERS WITH POWER ON Power Control Section

Design INPUT (FRONT PANEL) POWER SECTION (BACKPLANE) POWER CONTROL SECTION (FRONT PANEL)

Mass & Power Mass Power 824 Grams CBE (BOARD WITH FRONT PANEL) Shielding Mass held by IDPU Chassis Growth/Uncertainty Margin is 5% Power

TEST Sample Tester

STATUS WORKING SUPPLY TESTED WITH IDPU TESTED WITH EMFISIS FLOATER EFFICIENCY 80% OVERALL EFFICIENCY IS ~50% VERIFIED 1% REGULATION

INRUSH TEST Inrush Profile

SCHEDULE TASK COMPLETION DATE TEST PCB PORTION OF LVPS SEPT 30 NEW ETU LAYOUT RECEIVED OCT 2 EFFICIENCY BUILD NEW ETU OCT 23 SYNC SEQUENCE OCT 27 LINE REGULATION OCT 30 LOAD REGULATION CROSS REGULATION MSK INRUSH DEFEAT CIRCUIT RIPPLE MEASUREMENTS CURRENT TRIP THRESHOLDS NOV 6 MONITOR GAINS CONDUCTED EMISSIONS THERMAL TEST NOV 13 FLIGHT LAYOUT NOV 27 BUILD FIRST FLIGHT UNIT DEC 15 TEST FIRST FLIGHT UNIT JAN 8

PEER REVIEW RFAs TITLE DESCRIPTION RESPONSE Stress Analysis Ensure stress analysis done on all boards by CDR Parts chosen at design to accommodate stress margins PCB Switch Dissipation Look at thermal dissipation of FET switches on PCB, is heat sinking necessary? No additional heat sinking is necessary. Two of the higher dissipation FETS have new part numbers and the temp rise of the highest is less than 3°C. LVPS Thermal Vacuum Test Check hot and cold operation of LVPS in Thermal Vacuum, in particular sync operation, soft start, in rush times, 1526 startup, floater and 225 supply outputs. Verify at hot that parts do not exceed rated temperatures. Post CDR on complete ETU Measure LVPS Efficiency Measure efficiency of all supplies Total efficiency of supplies is presently ~ 50% Measure LVPS Cross Regulation Verify that cross regulation of supplies meets 5% goal Will test asap, perhaps on new ETU (post CDR) LVPS Free-run Frequency Verify that free run frequency of 1526 does not go above 90% of sync frequency Currently, set point is 95% of sync frequency. LVPS Soft start capacitors Include soft start capacitors in schematics Will be included where needed Implement temporary current limiting on IDPU supply Allow high inrush on the IDPU supply, but safe instrument in case of short To be implemented with timed increase of overcurrent threshold on new ETU (post CDR).

Issues CONSUMPTION NOISE Improve efficiency Reduce amplitude of tone at 200 kHz