Embedded Systems Software Training Center Workshop 1. ARM basics. CPU frequency configuration and general purpose I/O. COPYRIGHT © 2015 DSR CORPORATION

Objectives Build and launch demonstration example on STM32F4DISCOVERY board. Modify provided example to perform a test task. Copyright © 2015 DSR Corporation

Test task: Compile and launch provided example. Explore code. Set system clock frequency ½ of maximal (84MHz). Flash LEDs on extension board from 1 to 8 in an endless loop. Each time lights only one LED. On user button press change system clock source from external to internal oscillator and back. Use SW and SWS bits in RCC_CFGR register. Copyright © 2015 DSR Corporation

Chipset frequency configuration Three different clock sources can be used to drive the system clock (SYSCLK): HSI oscillator clock signal is generated from an internal 16 MHz RC oscillator and can be used directly as a system clock, or used as PLL input. HSE oscillator clock signal can be generated from external crystal/ceramic resonator or external user clock SYSCLK configuration for STM32F4DISCOVERY board: SYSCLK (system_ stm32f4xx.h) = PLL_VCO / PLL_P PLL_VCO(system_ stm32f4xx.h) = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N HSE_VALUE (stm32f4xx.h) = 8 000 000 Hz Copyright © 2015 DSR Corporation

GPIO configuration Configuration registers: GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR and GPIOx_PUPDR; Data registers: GPIOx_IDR and GPIOx_ODR; Set/reset register: GPIOx_BSRR; Locking register: GPIOx_LCKR; Alternate function selection registers: GPIOx_AFRH and GPIOx_AFRL. To configuring GPIO using SPL driver: Include stm32f4xx_gpio.h in your project; Enable the GPIO AHB clock using the following function RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); Configure the GPIO pin(s) using GPIO_Init(); To get the level of a pin configured in input mode use GPIO_ReadInputDataBit(); To set/reset the level of a pin configured in output mode use GPIO_SetBits()/GPIO_ResetBits(); Copyright © 2015 DSR Corporation

Thank you! COPYRIGHT © 2015 DSR CORPORATION 6