Dr. Clincy Professor of CS CS 3501 - Chapter 3 (3A and 10.2.2) Dr. Clincy Professor of CS Start on Final Project work after this lecture at 9pm Dr. Clincy Lecture Slide 1 1

Recall Previous Covered Flip Flops SR Flip Flop D Flip Flop Dr. Clincy Lecture Slide 2 2

T Flip Flop T Flip Flops are good for counters – changes its state every clock cycle, if the input, T, is 1 Positive-edge triggered flip flop Since the previous state of Q was 0, it complements it to 1 Dr. Clincy Lecture

JK Flip Flop Combines the behavior of the SR and T flip flops First three entries are the same behavior as the SR Latch (when CLK=1) Usually the state S=R=1 undefined – for the JK Flip Flop, for J=K=1, next state is the complement of the present state Can store data like a D Flip Flop or can tie J & K inputs together and use to build counters (like a T flip flop) Dr. Clincy Lecture

Registers and Shift Registers A Flip Flop can store ONE bit – in being able to handle a WORD, you will need a number of flip flops (32, 64, etc) arranged in a common structure called a REGISTER. All flip flops are synchronized by a common clock Data written into (loaded) flip flops at the same time Data is read from all flip flops at the same time F F F F 1 2 3 4 In D Q D Q D Q D Q Out Clock Q Q Q Q A simple shift register. Want the ability to rotate and shift the data Clock pulse will cause the contents of F1, F2, F3 and F4 to shift right (serially) To do a rotation, simply connect OUT to IN Dr. Clincy Lecture

Registers and Shift Registers Can load either serially or in parallel When clock pulse occurs, Serial shift takes place if Shift’/Load=0 or if Shift’/Load=1, parallel load is performed Dr. Clincy Lecture

Counters Hmmm Called a Ripple Counter 3-stage or 3-bit counter constructed using T Flip Flops With T Flip Flips, when input T=1, the flip flop toggles – changes state for each successive clock pulse Initially all set to 0 When clock pulse, Q0=1, therefore Q’=0 disabling Q1 and Q1 disables Q2 (have 1,0,0) For the 2nd clock pulse, Q0=0, therefore Q’=1, causing Q1=1 and therefore Q’=0 disabling Q2 (have 0,1,0) For the 3rd clock pulse, Q0=1, therefore Q’=0 disabling Q2 and therefore disabling Q3 (have 1,1,0) Etc…. LSB 000 001 010 011 100 101 110 111 Hmmm Dr. Clincy Lecture Called a Ripple Counter

NOTE Your book doesn’t do a good job in showing you how to derive or design sequential circuits (using state and state assignment tables) – the lecture will do so – please pay close attention to the lecture in understanding how to derive sequential circuits. You can print out the slides in this lecture only for the next exam. You should NOT add any notes to the printed slides. You will receive a penalty if personal notes are written on the slides Dr. Clincy Lecture Slide 8 8

Combinatorial or Combinational Logic Recall Circuit New Input Current State or Output Combinatorial or Combinational Logic Current State or output of the device is only affected by the current inputs Examples: Decoders Multiplexers Current State or output of the device is affected by the previous states Circuit Flip Flops New Input Previous State or Output Current State or Output Sequential Logic Examples: Shift Registers Counters Dr. Clincy Lecture

Sequential Circuit – State Diagram If x=0, count up, If x=1, count down Interested when 2 is realized – z=1 when reach 2, else z=0 If at 0 and x=0, count up to 1 (and z=0) If at 0 and x=1, count down to 3 (and z=0) x = z ¤ 1 S2 S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0 State diagram describes the functional behavior without any reference to implementation Dr. Clincy Lecture

Sequential Circuit – State Table Can represent the info in the state diagram in a state table x = z ¤ 1 S2 S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0 Dr. Clincy Lecture

Sequential Circuit – Equation Inputs – y2,y1,x Outputs –Y2, Y1 Dr. Clincy Lecture

Sequential Circuit – Circuit Design D Flip Flops used to store values of the two state variables between clock pulses Output from Flip Flops is the present-state of the variables Input, D, of the Flip Flops is the next-state of the variables Dr. Clincy Lecture

Finite State Machine Model The example we just implemented is an example of a “Finite State Machine” - is a model or abstraction of behavior composed of a finite number of states, transitions between those states, and actions Dr. Clincy Lecture