III-V HBT Modeling Issues for Power Amplifier Applications

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Presentation transcript:

III-V HBT Modeling Issues for Power Amplifier Applications Pete Zampardi peter.zampardi@skyworksinc.com (805) 480-4728

ALL MODELS ARE WRONG! A PRIMARY JOB OF THE RF DESIGNER IS TO UNDERSTAND THE LIMITS OF THE MODEL THEY ARE USING - M. Golio - GaAs IC Short Course, 1998

Outline Current Status Some III-V Modeling Problems Conclusion Hetero-junction Effects Self-Heating Breakdown Negative Differential Mobility and Velocity Overshoot Passivation Ledge on GaAs Model Focus/Other Issues Conclusion

Various Shells of Modeling Activities Bonds, Package Device Modeler Interconnect, Substrate, Thermal Device Module Delivering a product requires good modeling of all shells!

Current Status Most III-V houses use either VBIC, SGP (modified sub-circuit), or sometimes “proprietary” models. Largely unaware of what is going on in silicon. General Strategy RF Path prediction must be “Close Enough” to tune (there are many other things ignored) Bias circuits (analog) must be accurate Due to process variations, almost no thought to statistical or scaleable device models This is actually more important BECAUSE of process variation Other Issues If it doesn’t converge, why should anyone use it? Wafers can come back from fab faster than modelers can model. Mask are also cheap. Must be available in the simulators you use

VBIC – As an Example How III-V Guys Use The VBIC Model What is left is basically a Gummel-Poon with self-heating Great improvements for Si, no new physics for GaAs

Hetero-junction Effects Often mistaken for series resistances! BE hetero-junction looks like Re BC hetero-junction looks like Rc/Quasi-Saturation -BE or BC Barriers Cause Ic to Roll-off at High Bias Barrier store charge so they also impact AC results Slootboom, EDL, Vol. 12, No. 9, 1991 Tiwari, EDL, Vol. 9, No. 3, 1988 Iepi from Kull model is “similar” in form and can model BC barriers, but requires unrealistically high Rco! Temperature dependence is usually the give away! Important for ballast design, efficiency, and gain

Examples of DHBT Effect CCHBT Shows DHBT Effect GaInNAs has “soft” knee

Self-Heating D T = R P I V GaAs: kth=1.5 W/cm-K (Si) versus 0.44 W/cm-K (GaAs) it’s also temperature dependent! This is very important for GaAs devices! D T = R t h P I c V e d V b e T J c = - E g q + 1 3 . 8 k GaAs: Deviates due To contact metals (Yeats) Important for bias circuits, DC operating point, and ballast design Coupling is very critical too! Extraction of Rth, Cth Is Hard – Also Depends on Local Area

Practical Implications of Self-Heating Current Mirror Bias Circuits Large percentage of mis-match in expected bias current Self-heating differences between devices (~20%) Starting temperature differences between devices (up to 100%) RF Chain Current hogging/thermal run-away

Breakdown - For a PA, can get 3-4x Vcc across transistors Apparent Breakdown Start of VA fall-off - For a PA, can get 3-4x Vcc across transistors for 3 volt supply, this is 12 Volts (much larger for GSM) Si devices will operate in breakdown GaAs devices usually do not survive breakdown current + heat = roasted device - Noise in models proportional to Ic Weak Impact Ionization Does Poor Job of Modeling GaAs breakdown (From: IBM Micronews, Fourth Quarter, 1999, pp. 14-17)

Capacitance Cancellation in III-V HBTs Vce=1.5 Volts, Ae=40 mm2 High Speed Device PA Device - Due to negative differential mobility in III-V - Strongly dependent on collector design - Modeled in UCSD/DARPA model as “transcapacitance” Impacts anything that is affected by Cbc Matching Gain, Linearity

Physical Origin of fT Peaking (NDM, VO) 1 2 3 4 5 Peaking Depends on Collector design PAs use Long, Low-doped Collectors

Low Current Transit Time Model is Okay Up for Low Currents

What is “The Ledge”? Emitter Material on Extrinsic Base Forms a “ledge” Two Forms of Ledge Generally Used Conventional form Alloy-thru Poor Ledge Quality Creates Modeling Problems Good Ledge Improves Reliability, DC Current Gain, Scaling and Behavior of Devices! Don’t Want Electrons Here! Contact Metal Contact Metal Passivation Ledge Passivation Ledge Base Contact Base Contact Contact Layer Base Contact Base Contact Contact Layer Setback Layer Setback Layer Emitter Emitter Base Base Conventional Ledge Passivation Alloy-Thru Ledge Passivation

Passivation Ledge Effects If improperly designed, device dynamically changes area! If just curve-fitting, this can be mistaken for Re or EB barrier Affects resistance extraction, scaleability, and AC performance Requires “Two-Transistor” model (like in HiCUM) or simply fixing your technology

Models Should Focus on PA Related Parameters Want ALL DC/AC STUFF, PLUS: Single Tone Power Sweep Pout (dBm) vs Pin (dBm) Gain (dB) vs Pin (dBm) Icc vs Pin Ibb vs Pin Efficiency (%) vs Pin (dBm) PAE (%) vs Pin (dBm) 2nd, 3rd,5th Harmonic Power (dBm) vs. Pin (dBm) AM-AM, AM-PM conversion converted to ACPR Nice Papers: M. Tutt (Motorola) at BCTM on ACPR, Schroter ESSDERC paper on Distortion DeVreede BCTM on Linearity

Processes Are Poorly Represented III-V community spends a lot of time fitting “the modeling wafer” Designers almost never see wafers with these parameters again Curve fitting approach (from FETs?) is inefficient and requires an empire to run Models often do not predict wafer level pass-fail criteria III-V can benefit a LOT from silicon modeling mentality Process based statistical models Scaleable device models (very important as bias circuit complexity increases)

Example of Simple Statistical Model This is a problem with compact model, not parameters Beta, Rbsh, Vbe, tau adjusted Based on Physics Excellent tracking of process

Summary III-V’s have many physical effects, ignored by wired and RF designers are important for PA design. Everything matters for total PA design (layout, etc). Most models are not developed with PA design in mind Must look at what your customer cares about (correct FOMs) Large signal predictions must be good Models Must Converge or Designers Won’t Use Them! Designers must be careful III-V modeling has a long way to go to catch up to Si

ALL MODELS ARE WRONG BUT SOME ARE USEFUL Box, G. E. P. (1979). Robustness in the strategy of scientific model building. In R. L. Launer, and G. N. Wilkinson, (eds.) Robustness in Statistics. New York: Academic Press