From: Recent Advances and New Trends in Flip Chip Technology Date of download: 12/28/2017 Copyright © ASME. All rights reserved. From: Recent Advances and New Trends in Flip Chip Technology J. Electron. Packag. 2016;138(3):030802-030802-23. doi:10.1115/1.4034037 Figure Legend: Process flow for fabricating the SLIT (a) RDLs build-up on a Si-wafer, (b) chip to wafer bonding, (c) underfilling, (d) over molding the whole wafer, (e) reinforced wafer and backgrind the Si-wafer, (f) passivation, photoresist, mask, litho, etch passivation, sputter Ti/Cu, photoresist, mask, litho, (g) Cu plating, and (h) strip photoresist, etch Ti/Cu, C4 bumping