7.8 Frequency Limitations of Transistors (7-75) (7-76) Figure 7—24 Models for a-c operation: (a) inclusion of base and collector resistances and junction capacitances; (b) hybrid-pi model synthesizing Eqs. (7—75) and (7—76).

Figure 7—25 A low-noise Si bipolar transistor with fT = 8 GHz. This device has 9 interdigitated emitter stripes, each 1 mm X 20 mm. (Photograph courtesy of Motorola.)

7.6 Switching Figure 7—12 Simple switching circuit for a transistor in the common-emitter configuration: (a) biasing circuit; (b) collector characteristics and load line for the circuit, with cutoff and saturation indicated.

7.6.1 Cutoff Figure 7—13 The cutoff regime of a p-n-p transistor: (a) excess hole distribution in the base region with emitter and collector junctions reverse biased; (b) equivalent circuit corresponding to Eq. (7–45).

7.6.2 Saturation Figure 7—14 Excess hole distribution in the base of a saturated transistor: (a) the beginning of saturation; (b) oversaturation.

7.6.3 The Switching Cycle Figure 7—15 Switching effects in a common-emitter transistor circuit: (a) circuit diagram; (b) approximate hole distributions in the base during switching from cutoff to saturation; (c) base current, stored charge, and collector current during a turn-on and a turn-off transient.

7.6.4 Specifications for Switching Transistors Figure 7—16 Collector current during switching transients, including the delay time required for charging the junction capacitance; definitions of the rise time and fall time.

7.7 Other Important Effects 7.7.1 Drift in the Base Region Figure 7—17 Graded doping in the base region of a p-n-p transistor: (a) typical doping profile on a semilog plot; (b) approximate exponential distribution of the net donor concentration in the base region on a linear plot.

7.7.2 Base Narrowing Figure 7—18 The effects of base narrowing on the characteristics of a p+-n-p+ transistor: (a) decrease in the effective base width as the reverse bias on the collector junction is increased; (b) common-emitter characteristics showing the increase in IC with increased collector voltage. The black lines in (b) indicate the extrapolation of the curves to the Early voltage VA.

7.7.3 Avalanche Breakdown Figure 7—19 Avalanche breakdown in a transistor: (a) common-base configuration; (b) common-emitter configuration.

7.7.5 Base Resistance and Emitter Crowding Figure 7—20 Effects of a base resistance: (a) cross section of an implanted transistor; (b) and (c) top view, showing emitter and base areas and metallized contacts; (d) illustration of base resistance; (e) expanded view of distributed resistance in the active part of the base region.

Figure 7—21 An interdigitated geometry to compensate for the effects of emitter crowding in a power transistor: (a) cross section; (b) top view of implanted regions; (c) top view with metallized contacts. The metal interconnections are isolated from the device by an oxide layer except where they contact the appropriate base and emitter regions at “windows” in the oxide.

7.9 Heterojunction Bipolar Transistors Figure 7—26 Contrast of carrier injection at the emitter of (a) a homojunction BJT and (b) a heterojunction bipolar transistor (HBT). In the forward-biased homojunction emitter, the electron barrier qVn and the hole barrier qVp are the same. In the HBT with a wide band gap emitter, the electron barrier is smaller than the hole barrier, resulting in preferential injection of electrons across the emitter junction.

Figure 7—27 Removal of the conduction band spike by grading the alloy composition (x) in the heterojunction. In this example the junction is graded from the composition used in the AIGaAs emitter to x = 0 at the GaAs base. This grading typically takes place over a distance of 100 Å or less.