SEMINAR 1. Title : Introduction to Spintronics and III-V-OI MOSFET for Post-Si Technology Node 2. Speaker : Hyung-jun Kim (Center for Spintronics at KIST)

Slides:



Advertisements
Similar presentations
Lecture Metal-Oxide-Semiconductor (MOS) Field-Effect Transistors (FET) MOSFET Introduction 1.
Advertisements

Alain Espinosa Thin Gate Insulators Nanoscale Silicon Technology PresentersTopics Mike DuffyDouble-gate CMOS Eric DattoliStrained Silicon.
Derek Wright Monday, March 7th, 2005
High-K Dielectrics The Future of Silicon Transistors
Miniaturizing Computers: Evolution of Processors
Lecture 0: Introduction. CMOS VLSI Design 4th Ed. 0: Introduction2 Introduction  Integrated circuits: many transistors on one chip.  Very Large Scale.
MSE-630 Gallium Arsenide Semiconductors. MSE-630 Overview Compound Semiconductor Materials Interest in GaAs Physical Properties Processing Methods Applications.
Technologies for integrating high- mobility compound semiconductors on silicon for advanced CMOS VLSI Han Yu ELEC5070.
Molecular Dynamic Simulation of Atomic Scale Intermixing in Co-Al Thin Multilayer Sang-Pil Kim *, Seung-Cheol Lee and Kwang-Ryeol Lee Future Technology.
G.K.BHARAD INSTITUTE OF ENGINEERING DIVISION :D (C.E.) Roll Number :67 SUBJECT :PHYSICS SUBJECT CODE : Presentation By: Kartavya Parmar.
Nilufa Rahim C2PRISM Fellow Sept. 12, What is Engineering? Engineering is the field of applying Science and Mathematics to develop solutions that.
Magnetoresistive Random Access Memory (MRAM)
Chapter Intrinsic: -- case for pure Si -- # electrons = # holes (n = p) Extrinsic: -- electrical behavior is determined by presence of impurities.
Spintronics. Properties of Electron Electron has three properties. Charge Mass Spin.
Introduction to Spintronics
ECE 875: Electronic Devices Prof. Virginia Ayres Electrical & Computer Engineering Michigan State University
Submitted To: Presented By : Dr R S Meena Shailendra Kumar Singh Mr Pankaj Shukla C.R. No : 07/126 Final B. Tech. (ECE) University College Of Engineering,
Saptarshi Das, PhD 2. Adjunct Birck Research Scholar Birck Nanotechnology Center Purdue University West Lafayette, Indiana Post-doctoral Research.
CMOS Fabrication EMT 251.
Introduction to CMOS VLSI Design Lecture 0: Introduction.
3. Date : March 22 (Mon), 5:00~6:15 P.M.
Evaluation of Polydimethlysiloxane (PDMS) as an adhesive for Mechanically Stacked Multi-Junction Solar Cells Ian Mathews Dept. of Electrical and Electronic.
• Very pure silicon and germanium were manufactured
SEMINAR 1. Title : Organic/2D material based devices for flexible electronics 2. Speaker : Tae Hoon Lee ( Kwangwoon University ) 3. Time : 16:00.
SEMINAR 1. Title : Present and Future of Korean Manufacturing Industry
SEMINAR 1. Title : Backplane Technology (1)
ECE 695V: High-Speed Semiconductor Devices Peide (Peter) Ye Office: Birck Tel: Course website:
SEMINAR 1. Title : Electroactive Polymers for Innovative Energy Devices 2. Speaker : Young-Gi Kim, Ph.D (Delaware State University ) 3. Time : (10:30-12:00),
SEMINAR 1. Title : Solution-based Thin-film Formation of Carbon and Organic Materials for Field-Effect Transistors and Sensors 2. Speaker : Steve.
Magnetoresistive Random Access Memory (MRAM)
SEMINAR 1. Title : Novel properties of graphene-based vertical-junction diodes and applications 2. Speaker : Suk-Ho Choi ( Dept. of Applied Physics,
SEMINAR 1. Title : The Basics of OLED
SEMINAR 1. Title : Holotomography for non-invasive label-free 3-D imaging of live cells and tissues 2. Speaker : YongKeun Park ( KAIST ) 3.
SEMINAR 1. Title : Generation of Nucleic Acid Biopolymers with Complex Functionalities 2. Speaker : Prof. Seung Soo Oh (Department of Materials Sci. and.
SEMINAR 1. Title : Direct measurements of inter-membrane forces using Surface Forces Apparatus (SFA): Role of membrane protein concentrations and lipid.
SEMINAR 1. Title : Integration and characterization of long term stable novel graphene devices 2. Speaker : Byoung Hun Lee 3. Time : 16:00~17:00 4. Place.
SEMINAR 1. Title : Discovery of Protein-Protein Interaction Modulators Using Affinity-Based High-Throughput Screening 2. Speaker : Hyun-Suk Lim (포항공대 (POSTECH))
SEMINAR 1. Title : Toward the first-principles design of next-generation electronic devices based on two-dimensional nanomaterials 2. Speaker : Yong-Hoon.
UV-Curved Nano Imprint Lithography
Microelectronic Circuits Spring, 2013
SEMINAR 1. Title : Introduction of Emotional Image Quality Metrology Technology 2. Speaker : Seungbae LEE, Master (Samsung Display) 3. Time : 15:00 – 18:00,
SEMINAR 1. Title : Roles of microRNA in immune cell biology
SEMINAR 1. Title: Thin Film Process Technology for AMOLED Display
SEMINAR 1. Title :Introduction of flow lithography and versatile applications 2. Speaker :Jiseok Lee 3. Time : 16:00~17:00 4. Place :: e+ Lecture Hall.
SEMINAR 1. Title : Growth, Fabrication, and Characterization of Nano-/Micro-structured LEDs 2. Speaker : Dong Seon Lee 3. Time : 16:00~17:00 4. Place ::
SEMINAR 1. Title : Imaging nanoscale magnetism with scanning magnetometers based on diamond quantum defects 2. Speaker : Donghun Lee.
Thin film technology doctoral course L2210
北京大学量子材料科学中心 Seminar Qinglin He
EE 4611 INTRODUCTION 21 January 2015 Semiconductor Industry Milestones
Second PhD Summer School on Defects in Semiconductors Ghent University, Belgium September 2018   Goal of the 5-day doctoral school is to introduce.
SEMINAR Title : Next Generation OLED
SEMINAR 1. Title: Implantable medical device based on wireless power transferring 2. Speaker: Sung Q Lee (Managing director/ Ph. D, Multidisciplinary.
SEMINAR 1. Title : Physics in contacts between probes and quantum world 2. Speaker : Myung-Ho Bae (Korea Research Institute of Standards and Science)
SEMINAR 1. Title : Non-volatile memory device and application
Information Storage and Spintronics 13
Information Storage and Spintronics 10
Search for Superconductivity with Nanodevices
Presented by: Bc. Roman Hollý
Introduction to Materials Science and Engineering
Fouad N. Ajeel Lecture 1, Slide 1 Second class– semester 1 College of Science University of Sumer Analog Electronics Second class: semester 1.
SEMINAR 1. Title : Quantum photonics with solid-state quantum emitters
Sung June Kim Semiconductor Device Fundamentals Introduction Sung June Kim
Semiconductor devices and physics
ECE 695V: High-Speed Semiconductor Devices Peide (Peter) Ye Office: Birck Tel: Course website:
• Very pure silicon and germanium were manufactured
5/29/2019 Course Objectives This course teaches analog integrated design using CMOS Technology Analog Circuit Design.
Beyond Si MOSFETs Part IV.
Epitaxial Deposition
Strained Silicon Aaron Prager EE 666 April 21, 2005.
ICST Course 2019 spring.
Presentation transcript:

SEMINAR 1. Title : Introduction to Spintronics and III-V-OI MOSFET for Post-Si Technology Node 2. Speaker : Hyung-jun Kim (Center for Spintronics at KIST) 3. Time : 16:00 – 17:00, Thursday, October 12, 2017 4. Place : e+ Lecture Hall (room 83188), 2nd Research Building, Sungkyunkwan University 5. Summary : Si-based integrated circuits have been intensively developed over the past several decades through ultimate device scaling. However, the conventional Si transistor scaling has been fast approaching its physical limits. These limitations have boosted the search for a new concept of device mechanism or alternative active materials of high carrier mobility, allowing a reduction in power consumption without a loss of performance in the application for complementary metal oxide semiconductor (CMOS). One of attempts to circumvent the Si technology limits is based on the use of III-V compound semiconductor due to their superior benefits, such as high electron mobility and direct bandgap. In particular, the heterogeneous integration of high-quality III-V layers on the Si is the basic technology to use their physical properties on a Si platform. In this talk, I present two research topics of spintronics and III-V-on-insulator (III-V-OI) MOSFET technology for low power device applications. More specifically, the mechanism of spin transistor and spin-transfer-torque MRAM will be introduced in the first part. As proof-of-concept devices, we demonstrate III-V-OI MOSFET on Si substrates using a direct wafer bonding(DWB) and epitaxial lift-off(ELO) techniques. In the last part, we introduce the concept of monolithic 3D integrated III-V CMOS on Si substrates. 6 Background : Education Ph.D. in Materials Science and Engineering (2003), University of California Los Angeles M. S in Metallurgical Engineering (1997), SungKyunKwan University B. S in Metallurgical Engineering (1995), SungKyunKwan University Work Principal Research Scientist (2005-present), Center for Spintronics at KIST Professor (2006-present), Division of Nano & Information Technology, KIST School Post doctoral (2003-2005), Dept. of Electrical Engineering at UCLA 7. Questions : (☏ 031-299-4115) <spin transistor> <STT-MRAM> <InGaAs-OI MOSFET>