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8085 Microprocessor Architecture – Demultiplexing the AD7-AD0

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Parul Polytechnic Institute Subject Code : 3330705 Name Of Subject : Microprocessor and assembly language programming Name of Unit : Introduction to microprocessor Topic : Multiplexed address and data bus Name of Faculty : H.M.Avaiya & N.D.Dhameliya Name of Students: (i) Parekh Krishna(038) (ii) Shah Rutu(054)

MICROPROCESSOR ARCHITECTUR AND MICROPROCESSOR SYSTEM

DEMULTIPLEXING MULTIPLEXED ADDRESS/DATA BUS

The multiplexed address/data bus Ad7-AD0 is used to transfer data and address both. In order to perform the read or write operation , the memory device requires to identify memory location which is specified by 16-bit address. The higher-order address is available through A15-A8 address lines and lower-order address is available through AD7-AD0.

[ FIG : DE MULTIPLEXING OF MULTIPLEX ED ADDRESS DATA BUS.]

The lower-order address must be latched as it is required by the memory device and AD7-AD0lines must be made free to transfer data. The ALE signal is used to demultiplex AD7-AD0 as shown in figure. During initial period of instruction execution ALE goes high and multiplexed address/data bus AD7-AD0contains lower byte of the 16-bit address.

When ALE goes low, this lower – order address is latched into latch and is made available to the memory device. It makes the multiplexed path free for data transfer.

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