1st micro 1971 calculator 2300 transistors 4-bit microprocessor 740 KHz 4 KB program memory 640 bytes data memory 3-level deep stack No interrupts 16-pin DIP

8-bit microprocessor 2 MHz 64 KB RAM stack in RAM 256 I/O ports 40-pin DIP

8-bit microprocessor Up to 20 MHz 64 KB RAM 256 I/O ports 8080 emulation mode 40-pin DIP

Intel 8086 16-bit microprocessor 16-bit data bus up to 10 MHz 1 MB RAM 64K I/O ports 40-pin DIP 1 general purpose registers, 2 segment registers, 3 Adder, 4 Bus C, 5 Queue commands, 6 control system, 7 control system bus, 8 Bus A, 9 ALU, 10 Address bus, 11 Data bus, 12 Rail Control Registers: AX -accumulator, BX – base, CX - count, DX - data, SP - stack ptr, BP - base ptr, SI - source index, DI - Destination Index ,CS - code Segment, DS - data segment, SS - stack segment, ES - extra segment, IP - Instruction Pointer.

Motorola 6800 “From Chips to Systems”, R. Zaks, A. Wolfe 8-bit microprocessor up to 2 MHz 64 KB RAM no I/O ports 40-pin DIP “From Chips to Systems”, R. Zaks, A. Wolfe

M68000

M68000 “The Architecture of Microprocessors”, F. Anceau

Processing multiple instructions at the same time Pipelining: Processing multiple instructions at the same time ["Pipeline MIPS" by Hellisp - Own work. Licensed under Public Domain Wikimedia Commons - http://commons.wikimedia.org/wiki/File:Pipeline_MIPS.png#/media/File:Pipeline_MIPS.png]

Reading/Expectations Design Philosophy Behind Motorola's MC68000: part 1, part 2, part 3 [April 1983 © BYTE Publications Inc] Great Microprocessors of the Past and Present [2005, John Bayko] How Microprocessors Work [©1998-2015, Marshall Brain, HowStuffWorks, Inc.] How Computer Memory Works [©1998-2015, Jeff Tyson, HowStuffWorks, Inc.] How Caching Works [©1998-2015, Guy Provost, HowStuffWorks, Inc.] Expectations: given the architecture diagram of a processor, identify registers and bus structure explain the steps and the movement of instructions/data required to execute an assembly language instruction