Digital Logic Last Time … This Time … Control Path, Arithmetic Ops a 1 2 a U1 3 4 b This Time … Control Path, Arithmetic Ops CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Digital Logic Where? Control Circuits – CPU control path - system board (later) ALU Structure – add, sub, and, or, not Data Memory Code Memory ALU X Y W 1 7 MUXES Address Decoder CBP 2002 ITY 270 Computer Architecture

Boolean Notation, Truth Tables 1 A B O A and B Easy Way to write truth tables - count in binary ! AB A B O 1 A B C 1 A or B A B O A + B A O A O 1 NOT A A _ CBP 2002 ITY 270 Computer Architecture

Digi Logic Design 1 - use Gates B O Comparator Circuit – outputs a ‘1’ if A and B are equal, else ouput a ‘0’ 2. Make each individual term A B O 1 1 1 1 3. Combine the terms with OR gate 1. Look for lines with out = ‘1’ CBP 2002 ITY 270 Computer Architecture

… again with Boolean Algebra 1 _ _ “Not A and Not B” AB AB “A and B” _ _ _ A AB + AB _ A AB _ B B AB CBP 2002 ITY 270 Computer Architecture

Address Decoder Exercise B O4 A B O1 O2 O3 O4 1 O1 = AB _ A B CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Decoder Application Selecting Registers, e.g, add r2,r1,r0 r1 r2 r0 X Y W add rd rs rt unused decoder MIPS has 5-bit fields for registers, so are 32 r0 r0 r0 cs Registers CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture MUX Exercise A B Op C A B O C = 0 C A B O 1 A B O C = 1 What is MUX doing here ? CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture MUX is a Selector A A B Op C B C CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Multibit MUX A A B O C B C CBP 2002 ITY 270 Computer Architecture

MUX Application Y’ Y Selection of Datapath into one ALU input. Datapath Y from instruction add r2,r0,r1 ALU Y Datapth Y’ from instruction addi r2,r0,4 Sam has been designed so all immediate constants come in via Y’ add rd rs rt unused Immediate bit of op-code CBP 2002 ITY 270 Computer Architecture

Multiplexed Address/Data Bus, e.g. PCI Bus Address/Data Bus MUXing CPU MEM addr data CPU MEM add/dat address address data data Pentium System Bus Multiplexed Address/Data Bus, e.g. PCI Bus CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Digi design 2 - use MUXes A B O I1 1 I2 I3 I4 A B O 1 A B Op 0 0 0 1 1 0 1 1 1 A B Op In 1 In 2 In 3 In 4 “ Muxes can be used to implement arbitrary combinatorial circuits “ CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture MUX Design Exercise 3 input parity detector A B C O 1 CBP 2002 ITY 270 Computer Architecture

Designing Using ROM/RAM B O 0 0 0 1 1 0 1 1 1 0 1 1 0 O 1 1 1 0 O A B O 0 0 0 1 1 0 1 1 1 decoder A B Several MUX’es fed with the same AB produce a multibit output. So does a ROM or RAM. CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Programmable Logic Arrays _ ABC Fuse majority CBP 2002 ITY 270 Computer Architecture

Addition of Binary Numbers 1 0 A 1 1 A B B 0 1 1 0 Carry = 0 Sum = 1 Carry = 1 Sum = 0 1 1 0 1 1 0 0 Multibit add - cascade sum and carry ops. CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Full Adder A A B Ci S Co 1 S Co 1 Carry In B Full Adder Carry Out Sum CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Full Adder A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 1 1 A B Ci O Co 1 O Co 1 CARRY SUM CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture 4-bit Adder a3 a2 a1 a0 b3 b2 b1 b0 Full Adder Full Adder Full Adder Full Adder Carry Out s3 s3 s3 s3 CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Let’s Build an ALU Carry In A B + Carry Out S1 S0 CBP 2002 ITY 270 Computer Architecture

Issues Concerning Numbers Multiplication and Division Subtraction Negative Numbers Fractional and Real Numbers Characters and Strings CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Sequential Circuits Traffic Lights Washing Machines Fetch-Execute Cycle CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Counters Clock 4-bit Counter 0 1 0 0 (4) Reset T0 T1 T2 T3 T4 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 How to get this to sequence 0 1 2 3 4 0 1 2 3 4 0 1 2 3 4 ? CBP 2002 ITY 270 Computer Architecture

Traffic Light Sequencing Clock T0 T1 T2 T3 4-bit Counter Reset T2 T1 0 1 0 0 (4) Combinatorial Logic T3 T0 CBP 2002 ITY 270 Computer Architecture

Fetch Execute Sequencing Decode, Reg Op ALU Op Mem Access Reg Write 3 1 + -- ALU Counter Decoder Clock ALU Data Memory Code Memory ALU X Y W 1 7 CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Representing Numbers 000 110 001 100 010 011 101 111 5 1 7 2 6 4 3 000 110 001 100 010 011 101 111 -3 1 -1 2 -2 -4 3 Let’s take some 3-bit numbers. “2’s Complement” – complement it (0->1 and 1->0) then add 1 CBP 2002 ITY 270 Computer Architecture

2’s Complement Properties Most Significant Bit (MSB) gives sign. 000 110 001 100 010 011 101 111 -3 1 -1 2 -2 - 4 3 Addition ? 0 0 1 0 1 0 0 1 1 1 2 3 1 1 1 1 1 0 1 0 1 -1 -2 -3 Subtraction by Addition 0 0 1 1 1 1 0 0 0 1 -1 0 0 1 1 1 1 0 0 0 1 3 -2 1 MSB is Sign Bit ! 3 - 2 = 3 + (-2) = 1 CBP 2002 ITY 270 Computer Architecture

Subtraction by Addition Full Adder a3 a2 a1 a0 b3 b2 b1 b0 s3 1 CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture HEX and Chars Binary Hex 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 9 1 0 1 0 A 1 0 1 1 B 1 1 0 0 C 1 1 0 1 D 1 1 1 0 E 1 1 1 1 F Hexadecimal Shorthand each nibble rep’d as a character … 1 0 1 1 0 1 1 1 B 7 Useful in Machine Level Programming and HTML scripting UNICODE HEX Ascii 30 41 A 61 a 6D m 0D CR ASCII CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Multiplication 1 3 1 2 2 6 1 3 0 1 5 6 1 1 2 1 2 2 0 2 3 1 x 1 x x CBP 2002 ITY 270 Computer Architecture

ITY 270 Computer Architecture Multiplication A B 1 1 0 1 0 0 0 0 1 0 1 1 C Add/no-add A adder B 1 C - Initial values Add A to B SHR No Add Add A to B. Then Shift Right (SHR). Look at LSB bit. If this is 1 then Add A to B. A = B = AxB = CBP 2002 ITY 270 Computer Architecture