HIC Assembly - Liverpool

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Presentation transcript:

HIC Assembly - Liverpool ALICE ITS Plenary - November 7, 2017 M. Borri, L. Boynton, M. Buckland, M. Chartier, N. Clague, S. Lindsay

HIC assembly at Liverpool: Hardware: ALICIA 4 Module Assembly Machine (software v. 2.0.41) Up until now, we have run a connection to a fake database, but the software for the real production database has been newly installed and is ready for testing. Dummy HICs have been produced in three series: Series Numbers 0.1 – 0.7 First attempts 1 1.1 – 1.14 Switched to white glue mask. Switched to Araldite2011 after 2nd. 2 2.1 – 2.6 Switched to version 11 of glue mask and began using mask-handling tool.

Most common problem seen: In early assemblies, we saw glue seepage into the vias at the edge of the FPC, contaminating either the ASIC bond pads or the gold FPC pads: Contaminated ASIC bond pad Contaminated FPC bond pad Although the wirebonders were frequently able to remove the glue from the FPC pads and make a weld, this was obviously undesirable.

Assembly improvements: We saw considerable improvement after we began using glue mask version 11 (with the holes backed off from the edges). Allowing the glue to stand and cure (thicken) for some time before applying to the mask also seemed to help. Most recent assemblies: Version 11 glue mask, handled with mask gripper Shims on MAM Araldite 2011 given 40 minute standing time (in addition to 10 minute prep time) Result: Only minimal glue seepage, mostly a cosmetic problem. Straightforward to wire-bond.

Series 2 dummy HICs: ID Assembly Post-assembly 2.1 First attempt. Yellow-grade chips. Mask slightly to left, but looked ok. FPC not stuck to gripper. Trivial glue seepage in central vias (no ASIC pads contaminated). All pads bonded OK. 2.2 Red-grade chips. Test Assembly done to judge stretchiness of mask and repeatability of placement with new tool. FPC stuck to gripper. Glue through one via onto gold pads. Bonding all OK except for the one pad – glue cleaned off and rebonded with pull-strengths 11g, 12g, 5.4g 2.3 FPC stuck to gripper. Glue seepage through 2 vias, but only one bond pad contaminated. Bonded OK. 2.4 Glue settling time increased: 30→40mins Vacuum broken while peeling mask. FPC not stuck to gripper. 2 vias with trivial seepage (tiny blobs of glue), not affecting bond pads. Bonded perfectly. 2.5 Glue settling time: 40 mins FPC not stuck to gripper. Quick visual: looks perfect. 2.6 Red-grade chips. Official shim material used on MAM. 40-minute glue-settling time FPC not stuck to gripper. Quick visual: very good.

Post-assembly 1: metrology After assembly, the HIC is put through metrology on an OGP 624 smartscope. Example of measurement: Positions of ASIC bond circles within vias, to establish ASIC-FPC alignment:

Post-assembly 1: metrology Early assemblies showed a rotation between the FPC and the lines of ASICS. This complicated wirebonding, as bonding positions needed to be corrected by hand. Wirebonding program Early HICs:

Post-assembly 1: metrology When we began using the low-stick grey masks, metrology showed an improvement in alignment, which was confirmed by the wirebonders. Most recent HIC: Early HICs:

Post-assembly 2: bonding The assembled HICs are wirebonded on a Hesse & Knipps Bondjet 820. ASIC Bond parameters optimised The bonding parameters (ultrasonic power, wire deformation, loop height and shape) were optimised to give the best bond strength. FPC Bond parameters optimised

Post-assembly 2: bonding Wirebond strengths have been tested with a Dage 4000 Series pull tester. Mean: 11.96g Stdev: 2.44g

Post-assembly 3: Electrical testing FIFO tests have successfully been performed on HICs built with yellow-grade chips. The GUI to run the full barrage of tests is presently being debugged. (The GUI starts but crashes if a threshold scan is attempted)

Conclusions: Using v11 masks and the mask-handling tool, we have overcome our initial FPC-ASIC alignment and glue-seepage problems. We have been able to produce several HICs that have been wirebonded without issues. When yellow-grade chips have been used, we have been able to communicate with all 14. We are an a position to start producing modules. Depending on the chips used, we can produce (potentially) working modules, or dummies for practice stave-building.