VISTA work in Ulm since Jan. 2002 James R. O' Callaghan: Lateral heat extraction in VCSELs (finished) Åsa Haglund: Combined surface-relief and surface-grating for high-power single-mode polarisation-stable VCSELs (under work)

Investigations into Lateral Heat Extraction in VCSELs Dr. James R. O' Callaghan, 24th November 2003 Department of Optoelectronics, University of Ulm, Ulm, Germany.

Outline Motivation Design approach Device processing Results Conclusions Future work

Motivation VCSEL are ideal due to wavelength selectivity, ease of testing etc, Low Power due to limited aperture size and high thermal resistance leading to early thermal rollover. Extraction of heat from VCSEL should delay this inevitable thermal rollover.

Design approach Extraction of heat from the side walls. This approach goes beneath the active region. Galvanically grown gold at the side walls acts as a heat spreader. This requires minimisation of mesa size and therefore a dry etch must be used. Sidewalls must be electrically isolated but have low thermal resistance. Two methods: anodic oxidation isolation and deposited isolation Wet etch Dry etch

Process flow Two processes for isolation - one using anodic oxidation, the other using PECVD for isolation layer Deposition of 200nm SiO2 cap on wafer forms protective barrier for top p-Bragg mirror to prevent anodic oxidation. SiO2 surrounding mesa removed by Reactive Ion Etching (RIE) 1 2

Dry Etch Achieved by CAIBE. Using a single layer of resist. Etch depth 4.4m Highly vertical - 88o side walls. Nominal undercut. This minimizes the mesa size reducing the distance between active region and heat spreaders.

Anodic Oxidation A + - CCPS Isolation formed by anodic oxidation. Thickness of oxide monitored as a function of voltage across sample at a constant current. 60nm of oxide formed at 60V.

Galvanic seed metal To define the seed metal for the heatspreaders wet etch techniques must be used rather than liftoff. This is due to residual resist on sidewall and the anodic isolution desolving the resist. Window in seed gold defined lithographically after evaporation and chemically etched.

Galvanic 4.4m of galvanically grown gold. Mesa top surface protected by SiO2 isolation. Resist cannot be used around mesa due to residual resist preventing galvanic growth at sidewall base. After galvanic growth the SiO2 is etched off by RIE to make way for the p contact and the aperture.

Formation of p-contact. Standard image reversal lithography. Lift off also occurs on the boundaries of the VCSEL for isolation purposes. Lift-off is post galvanic to avoid resist on mesa sidewall.

The Finished Device Mesa sizes ranging from 40m to 52m in diameter. Aperture sizes range from 9m to 21m diameter. 4.4m deep galvanically grown gold sidewall. Isolation - 60nm of anodically oxidised GaAs or 200nm of SiO2.

Power Current Characteristics - SiO2 Isolation Over an entire range of mesa sizes there is a clear increase in output power for the devices with side wall heat spreaders.

Power Current Characteristics - Anodic Isolation Devices using anodic oxide isolation. Irregular results- high failure rate, poor isolation. High leakage currents. Shows promise but process must be stabilised.

Results Samples are taken from devices close to each other on wafer to avoid detuning effects. On average 7% increase in power. Power increase shown for all mesa sizes.

Conclusions Distinct increase in output power for VCSELs with galvanic heat spreading. Power increase occurs over a range of mesa sizes. Process stable for SiO2 sidewall passivation but not yet for anodic oxidation.

Future work Further stabilisation of process. Optimisation of mesa size and contact ratio. Optimisation of isolation thickness. Implementation on bottom emitting VCSELs

Acknowledgements Department of Optoelectronics, University of Ulm Dr. Jürgen Mähnß VISTA Everyone who gave my good advice.

Self aligned surface grating Johannes Michael Ostermann (Ulm) Pierluigi Debernardi (Torino) Asa Haglund (Chalmers) Rainer Michalzik (Ulm) Juergen Maehnss (Ulm) Anders Larsson (Chalmers)

Processing a) resist structured with e-beam b)etching c) Etch passivation d) mesa etching

First realisation

Results, Outlook Full technological process for lateral heat extraction developed Lateral heat extraction shown. Promising first realisation of grating surface-relief combination Processing of grating/surface-relief will be continued at Chalmers in May