Some notes on the Electro-Static Drives

Slides:



Advertisements
Similar presentations
Op-Amp- An active circuit element designed to perform mathematical operations of addition, subtraction, multiplication, division, differentiation and.
Advertisements

Analog-to-Digital Converter (ADC) And
Instrumentation Department Rutherford Appleton Laboratory27 March 2002 CMS Tracker FED Front End Module Analogue Circuit Considerations Draft 1.0 Rob Halsall.
STATIC Analyzer Sweep HVPS Requirements: –3 voltages to control the STATIC Electrostatic Analyzer –Programmable over -2V to +4kV with 0.01V resolution/noise.
Output Stages and Power Amplifiers Output stage delivers the output signal to the load without loss of gain due to Low output resistance D.S.P. Filter.
LIGO- G060XXX-00-R E2E meeting, September How to design feedback filters? E2E meeting September 27, 2006 Osamu Miyakawa, Caltech.
CMOS VLSIAnalog DesignSlide 1 CMOS VLSI Analog Design.
Sample servo diagrams and Bode plots. Acousto optic performance plots Unlock servo Measure gain and phase vs drive input K.
Controlling Systems Using IT (Level 3) Lecture – 1030 Thursday 23/04/2015 Boston College (Rochford Campus)
Basic Block Diagram of Op-Amp
We are Group5 Weatherstation The team Members are : Saran Jackson Robert Howard Robert Garvey Gene Fitzgerald Steven Dowling.
24Oct2013 D. Seitz SPP FIELDS RFS Analog Peer Review 24OCT
Differential Amplifier
OPA348 High Pass Filter Tim Green, MGTS Precision Linear Analog Applications July 9,
Differential Preamp Stephen Kaye New Preamp Design Motivation Move preamplifier from controller to the Vacuum Interface Board (VIB) Amplifies.
1 Electronic Circuits MULTI STAGE AMPLIFIERS. 2 Electronic Circuits There are several different multi-stage amp circuits that function as dc-amps. 1)COMPLIMENTARY.
Feedback: Part C – Oscillators Slides taken from:
Stefan Hild 1GWDAW 10, Brownsville, December 2005 Status of GEO 600 Stefan Hild, AEI Hannover for the GEO-team.
Math – What is a Function? 1. 2 input output function.
Operational Amplifiers The operational amplifier, also know as an op amp, is essentially a voltage amplifier with an extremely high voltage gain. One of.
The ECG UConn BME 290. Buffers What is a buffer? –Non-inverting amplifier with a gain of 1 Why use a buffer? –Buffers provide a high input impedance.
EEM3A – Analogue Electronics Dr. T. Collins
Lecture 7: First Order Filter and Bode Plot
By: Chenchen Qi Douglas Ciha John Hogan
Martin Hewitson and the GEO team Measuring gravitational waves with GEO600.
LSC Meeting: 3/14/01Inspiral Upper Limit - Detector Characterization 1 Inspiral Upper Limit: Detector Characterization Needs Nelson Christensen Carleton.
LIGO-G Z March 2007, LSC meeting, Osamu Miyakawa 1 Osamu Miyakawa Hiroaki Yamamoto March 21, 2006 LSC meeting Modeling of AdLIGO arm lock acquisition.
1 Frequency Noise in Virgo by Matt Evans. 2 The Actors  Noise Sources  Input Mode Cleaner length noise  Sensing noise on IMC lock  Frequency Servo.
Calibration/validation of the AS_Q_FAST channels Rick Savage - LHO Stefanos Giampanis – Univ. Rochester ( Daniel Sigg – LHO )
Throttle Arduino RC Receiver Stock Golf Cart Motor Controller Motor 1 PWM signal: Voltage: 0 – 5V Period = 22ms Positive Pulse Width: 1ms – 2ms Digital.
The Working Theory of an RC Coupled Amplifier in Electronics.
Analog Circuits Hiroyuki Murakami. CONTENTS Structure of analog circuits Development of wide linear range CSA system Problem of analog circuits How to.
Summary of iKAGRA Test Run Apr 11-25, 2016 Yuta Michimura Department of Physics, University of Tokyo May 9, 2016JGW-T
Operational amplifier
Operational amplifier
Introduction Filters are circuits that are capable of passing signals within a band of frequencies while rejecting or blocking signals of frequencies outside.
Pcal actuation of the TST stage of the DARM servo loop
Operational Amplifiers
Basic Block Diagram of Op-Amp
Electronic Devices Ninth Edition Floyd Chapter 14.
Time domain simulation for a FP cavity with AdLIGO parameters on E2E
AIDA design review 31 July 2008 Davide Braga Steve Thomas
Quiz: Determining a SAR ADC’s Linear Range when using Instrumentation Amplifiers TIPL 4102 TI Precision Labs – ADC Hello, and welcome to the TI Precision.
ESD Force Noise and Range for Various Modes of Operation
Data Acquisition System
Summary of iKAGRA Test Run Apr 11-25, 2016
Quiz: Driving a SAR ADC with a Fully Differential Amplifier TIPL 4103 TI Precision Labs – ADCs Created by Art Kay.
Time domain simulation for a FP cavity with AdLIGO parameters on E2E
Tunnel Magnetic system power supply №1 HVM+Heat Power supply HVT SM
The open loop gain of this op-amp is 105 and the bandwidth is 10 Hz
Operational Amplifiers
Lock-in amplifiers
PART 3:GENERATION AND DETECTION OF ANGLE MODULATION
Floating-Gate Circuits
Chapter 10 Figure 07.
Summary of the iKAGRA Run
Digital Control Systems Waseem Gulsher
Electronics: Demod + 4Q FE
Lesson 11: Transducer Electrical Interfaces
Self-Adjusting Equalizer Scott Lair
Frequency Noise in Virgo
Amplifiers: A Bio amplifier is an electrophysiological device, a variation of the instrumentation amplifier, used to gather and increase the signal integrity.
Hierarchical Control Notes – Blending Style
Naoki Watanabe et al. BTS 2017;2:
First look at Injection of Burst Waveforms prior to S1
Turning photons into bits in the cold
Y/I/Q channel blurring with 5x5 mean filter
Summary of the iKAGRA Run
ME1/1 Electronics Upgrade
Talk prepared by Stefan Hild AEI Hannover for the GEO-team
Presentation transcript:

Some notes on the Electro-Static Drives July 1, 2014

LLO ESD actuation calibration, log 13298 Used ALS DIFF, at 42 Hz, bias at -400 V ETMX: 1.85e-13 / f2 m/count ETMY: 1.73e-13 / f2 m/count Using F = 2*alpha*Vbias*Vsig = x*M*(2pi f)2: alpha = 1.2e-10 N/V2 Linearizer increases effective bias to -560 V, reducing inferred alpha to 0.9e-10 N/V2 Expected alpha = 4e-10 N/V2 131,000ct -> 400V 3e-3 V/ct

DAC noise DAC output noise is 150 nV/rHz, higher than ESD input noise of 25 nV/rHz: need some sort of filter between DAC and ESD Can we filter out more below 1 Hz? Need full range in this band for locking

ESD noise monitors Each channel: straight 1/40 monitor, then differential output 1 uV/rtHz noise divided to 25 nV/rHz (each leg) ADC input noise is 4 uV/rtHz Need a pre-amp with a gain of a few hundred, AC-coupling at a few Hz (this is essentially what the SUS noise monitor circuit does, D070480)