AM3352 pixel clock question

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Presentation transcript:

AM3352 pixel clock question Attached is a picture (06) of a measurement of the pixel clk coming from the AM3352 on a design I am working on.  It is a very sinusoidal signal.  I would have expected it to be a square wave.  I do have a 33 ohm resistor in series, but I shorted it out in the 07 image.  All that did was make it more sinusoidal.  I am also concerned that the signal isn’t reaching either 0V or 3.3V.   Do either of you have any thoughts on this topic?  Is there any sort of drive strength control on this chip?

AM3352 pixel clock question Picture #6, 33 ohm resistor in series

AM3352 pixel clock question Picture #7, 33 ohm resistor shorted

AM3352 pixel clock question Good question, the new scope shots are on a 300MHz scope full bandwidth. I was using a 100MHz scope not on full bandwidth. The 100MHz scope still can’t get a good read on the signal at full bandwidth though. Picture 08 has the 33 ohm and 09 is without the 33 ohm. 10 is without the LCD attached and no 33ohm. In 12 I bypassed the PCLK trace with 30 AWG wire, so I don’t think it is the stack up. Single ended 10x passive probe (tek P6139B), DC coupling Picture #8, with series 33 ohm resistor

AM3352 pixel clock question Picture 08 has the 33 ohm and 09 is without the 33 ohm. 10 is without the LCD attached and no 33ohm. In 12 I bypassed the PCLK trace with 30 AWG wire, so I don’t think it is the stack up. Picture #9, without series 33 ohm resistor

AM3352 pixel clock question Picture 08 has the 33 ohm and 09 is without the 33 ohm. 10 is without the LCD attached and no 33ohm. In 12 I bypassed the PCLK trace with 30 AWG wire, so I don’t think it is the stack up. Picture #10 – LCD not connected

AM3352 pixel clock question Picture 08 has the 33 ohm and 09 is without the 33 ohm. 10 is without the LCD attached and no 33ohm. In 12 I bypassed the PCLK trace with 30 AWG wire, so I don’t think it is the stack up. Picture #12 – PCLK bypassed with 30 AWG wire