Principles & Applications

Slides:



Advertisements
Similar presentations
ADDER, HALF ADDER & FULL ADDER
Advertisements

Combinational Circuits. Analysis Diagram Designing Combinational Circuits In general we have to do following steps: 1. Problem description 2. Input/output.
EET 1131 Unit 7 Arithmetic Operations and Circuits
Lab 10 : Arithmetic Systems : Adder System Layout: Slide #2 Slide #3 Slide #4 Slide #5 Arithmetic Overflow: 2’s Complement Conversions: 8 Bit Adder/Subtractor.
Number Systems & Operations
DPSD This PPT Credits to : Ms. Elakya - AP / ECE.
Arithmetic Operations and Circuits
Assembly Language and Computer Architecture Using C++ and Java
Assembly Language and Computer Architecture Using C++ and Java
Design of Arithmetic Circuits – Adders, Subtractors, BCD adders
Digital Arithmetic Wen-Hung Liao, Ph.D.. Objectives Perform binary addition, subtraction, multiplication, and division on two binary numbers. Add and.
ECE 331 – Digital System Design
ECE 301 – Digital Electronics
DIGITAL SYSTEMS TCE1111 Representation and Arithmetic Operations with Signed Numbers Week 6 and 7 (Lecture 1 of 2)
Computer ArchitectureFall 2007 © August 29, 2007 Karem Sakallah CS 447 – Computer Architecture.
Part 2: DESIGN CIRCUIT. LOGIC CIRCUIT DESIGN x y z F F = x + y’z x y z F Truth Table Boolean Function.
Arithmetic Operations and Circuits
Arithmetic Operations and Circuits Lecture 5. Binary Arithmetic let’s look at the procedures for performing the four basic arithmetic functions: addition,
FIGURES FOR CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION
Logic Gates Combinational Circuits
©2008 The McGraw-Hill Companies, Inc. All rights reserved. Digital Electronics Principles & Applications Seventh Edition Chapter 10 Arithmetic Circuits.
CS 105 Digital Logic Design
Data Representation – Binary Numbers
Chapter 7 Arithmetic Operations and Circuits Binary Arithmetic Addition –When the sum exceeds 1, carry a 1 over to the next-more-significant column.
Logical Circuit Design Week 8: Arithmetic Circuits Mentor Hamiti, MSc Office ,
Digital Arithmetic and Arithmetic Circuits
CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION.
Fall 2004EE 3563 Digital Systems Design EE 3563 Comparators  Comparators determine if two binary inputs are equal  Some will signal greater than/less.
CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION
CPU Internal memory I/O interface circuit System bus
EE2174: Digital Logic and Lab Professor Shiyan Hu Department of Electrical and Computer Engineering Michigan Technological University CHAPTER 8 Arithmetic.
Combinational Circuits
Digital Fundamentals Tenth Edition Floyd Chapter 2 © 2008 Pearson Education.
Principles & Applications
CHAPTER 2 Digital Combinational Logic/Arithmetic Circuits
CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: LECTURE TIME: 15:40 – 17:45 hrs. VENUE: SP-LAB.
©2010 Cengage Learning SLIDES FOR CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION Click the mouse to move to the next page. Use the ESC key to exit.
1 Ethics of Computing MONT 113G, Spring 2012 Session 4 Binary Addition.
ECE DIGITAL LOGIC LECTURE 15: COMBINATIONAL CIRCUITS Assistant Prof. Fareena Saqib Florida Institute of Technology Fall 2015, 10/20/2015.
Digital Electronics Principles & Applications Fifth Edition Chapter 2 Numbers We Use in Digital Electronics ©1999 Glencoe/McGraw-Hill Roger L. Tokheim.
Logic Design (CE1111 ) Lecture 4 (Chapter 4) Combinational Logic Prepared by Dr. Lamiaa Elshenawy 1.
Arithmetic Circuits I. 2 Iterative Combinational Circuits Like a hierachy, except functional blocks per bit.
1 Digital Logic Design (41-135) Chapter 5 Number Representation & Arithmetic Circuits Younglok Kim Dept. of Electrical Engineering Sogang University Spring.
ECE 3110: Introduction to Digital Systems
Unit 1 Introduction Number Systems and Conversion.
Addition and Subtraction
Digital Logic & Design Adil Waheed Lecture 02.
CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION
CHAPTER 1 INTRODUCTION NUMBER SYSTEMS AND CONVERSION
CHAPTER 1 : INTRODUCTION
Digital Arithmetic Wen-Hung Liao, Ph.D..
Introduction The term digital is derived from the way computers perform operation, by counting digits. Application of digital technology: television, communication.
Principles & Applications
Reference: Moris Mano 4th Edition Chapter 4
University of Gujrat Department of Computer Science
FUNCTION OF COMBINATIONAL LOGIC CIRCUIT
Digital Electronics Ms. Deepa Mehta.
ELL100: INTRODUCTION TO ELECTRICAL ENGG.
EE207: Digital Systems I, Semester I 2003/2004
12/7/
Instructor: Alexander Stoytchev
Instructor: Alexander Stoytchev
Binary to Decimal Conversion
XOR Function Logic Symbol  Description  Truth Table 
Arithmetic Circuits.
Half & Full Subtractor Half Subtractor Full Subtractor.
2's Complement Arithmetic
Half & Full Subtractor Half Subtractor Full Subtractor.
Computer Architecture
Unit IV Adders Subtractors Flip Flops Counters Multiplexes and De multiplexes. Integrated circuits-Op. amp – Characteristics Inverting amplifier - Non-inverting.
Presentation transcript:

Principles & Applications Digital Electronics Principles & Applications Fifth Edition Roger L. Tokheim Chapter 10 Arithmetic Circuits ©1999 Glencoe/McGraw-Hill

CHAPTER 10 PREVIEW Binary Addition Half & Full Adders Binary Subtraction Half & Full Subtractors Parallel Adders and Subtractors Using Adders for Subtraction Binary Multiplication Binary Multipliers 2s Complement

BINARY ADDITION Conceptually similar to decimal addition Example: Add the binary numbers 1010 and 11 (carry) 1 1 0 1 0 + 1 1 1 1 1

TEST 1 1 0 1 0 + 1 1 0 0 1 1 1 Add the Binary numbers 11010 and 1100 1 (carry) 1 (carry) 1 1 1 0 1 0 + 1 1 0 0 1 1 1

HALF ADDER Logic device that adds two binary numbers Only adds Least Significant Digit (LSD) column (1s column) in binary addition A B  (sum) C0 (carry out) Half Adder Input Output Logic Symbol: Logic Diagram:

Used for adding binary place values other than the 1s place FULL ADDER Used for adding binary place values other than the 1s place A B  (sum) C0 (carry out) Full Adder Input Output Cin Logic Symbol: Logic Diagram:

BINARY SUBTRACTION Example: Subtract binary number 101 from 1011 (borrow) 1 1 0 1 1 - 1 0 1 1 1

TEST Subtract binary number 11 from 1010 01 10 1 1 1 0 1 0 - 1 1 1 1 1

Subtracts LSD column in binary subtraction HALF SUBTRACTOR Subtracts LSD column in binary subtraction Input Output Logic Symbol: A Di (difference) Half Subtractor B B0 (borrow out) Logic Diagram:

Used for subtracting binary place values other than the 1s place FULL SUBTRACTOR Used for subtracting binary place values other than the 1s place A B Di (difference) B0 (borrow out) Full Subtractor Input Output Bin Logic Symbol: Logic Diagram: A B Di B0 H. S. Bin

PARALLEL ADDING Use half adder for LSD Use full adder for other digits A2 A1 A0 + B2 B1 B0

1s place uses half-adder 2s, 4s, 8s places use full adders Enter binary numbers to be added here PARALLEL ADDER 1 1 1 0 + 0 1 1 0 1 1 0 0 + 1 1 1 1 0 0 1 1 + 1 0 0 0 1 1 0 1 1 1 0 1 0 0 0 1 0 1 1 SUM appears here 1s place uses half-adder 2s, 4s, 8s places use full adders Parallel adders are available in IC form.

PARALLEL SUBTRACTOR USING FULL ADDERS HIGH at Carry in input acts like adding +1 to a 1s C number to form the 2s complement. 1sC is formed by four inverters. PARALLEL SUBTRACTOR USING FULL ADDERS HIGH at Carry in input makes this perform as a full adder circuit Binary numbers to be subtracted are input here 1 0 0 1 - 0 1 1 1 1 1 1 1 - 0 0 1 1 Note the use of four full adder circuits Also notice the addition of four inverters on the B inputs to the FAs 1 1 0 0 0 0 1 0 The result (difference) of the subtraction problem will appear here. Inverters

BINARY MULTIPLICATION Example: Multiply the binary numbers 111 and 101. 1 1 1 x 1 0 1 Multiplicand Multiplier 1 1 1 1st partial product 2nd partial product 1 1 1 3rd partial product 1 1 1 Product 111 x 101 can also be calculated: 111 + 111 + 111 + 111 + 111

TEST Multiply the binary numbers 101 and 100. 1 0 1 x 1 0 0 1 1 1 1

Binary multiplier circuits - utilize repeated addition. BINARY MULTIPLIERS Binary multiplier circuits - utilize repeated addition. Block Diagram: Multiplicand register Multiplier down counter Product Adder

2s COMPLEMENT NOTATION 2s complement representation - widely used in microprocessors. Represents sign and magnitude MSB LSB Sign bit (0 = + ; 1 = -) Decimal: +7 +4 +1 0 -1 -4 -7 2s Complement: 0111 0100 0001 0000 1111 1100 1001

Decimal to 2s Complement 2s COMPLEMENT - CONVERSIONS Converting positive numbers to 2s complement: Same as converting to binary Converting negative numbers to 2s complement: Decimal to 2s Complement 2s Complement to Binary - 4 (decimal) 1 1 0 0 (2s C) Convert decimal to binary 1s complement 0 1 0 0 1s complement 0 0 1 1 1 0 1 1 Add 1 Add 1 0 1 0 0 (Binary) - 4 = 1 1 0 0 (2s Complement)

ADDING/SUBTRACTING IN 2s COMPLEMENT 2s complement notation makes it possible to add and subtract signed numbers (Decimal) 2s Complement (- 1) + (- 2) 1 1 1 1 + 1 1 1 0 (- 3) Discard 1 1 1 1 2s complement (+1) + (- 3) 0 0 0 1 + 1 1 0 1 (- 2) 1 1 1 2s complement

TEST Add the following 2s complement numbers: (+5) + (- 4) 0 1 0 1 + 1 1 0 0 (+1) 1 1 Discard

PRACTICAL SUGGESTION FOR BINARY MATH Use a scientific calculator. Most scientific calculators have DEC, BIN, OCT, and HEX modes and can either convert between codes or perform arithmetic in different number systems. Most scientific calculators also have other functions that are valuable in digital electronics such as AND, OR, NOT, XOR, and XNOR logic functions.