LSST Camera Readout chip ASPIC LSST Camera Readout chip V. Tocut, J. Jeglot, M. Moniez, F. Wicek LAL ORSAY/IN2P3/CNRS, France H. Lebbolo, P. Antilogus, S. Bailey, D. Martin, R. Sefri LPNHE Paris/IN2P3/CNRS, France

Camera  3200 electronic channels @ 500kHz readout ck 3.2Gpix camera Filter in stored location L1 Lens L2 Lens L1/L2 Housing Camera Housing L3 Lens Raft Tower Filter in light path 3.2Gpix camera RAFT TOWER FEE Raft Assembly Flex Cable & FEE Cage Thermal Straps  3200 electronic channels @ 500kHz readout ck

DSI vs C&S Dual Slope Integrator or Clamp&Sample Image reconstruction: reference level + signal level Correlated Double Sampling CCD output signal = few µV / e- Output signal complexity : precise timing CCD output stage Dual Slope Integrator or Clamp&Sample CCD out CCD reset Clamp C&S out C&S reset Sample 2µs

Back end Board & Test Bench Tests Results Test Requirements (173K) DSI (proto1) C&S (proto1) Cross talk 0.05% (obj: 0.01%) 0.007% 0.02% Linearity 1% ~0.5% (proto1) ~0.5% Noise 7µV @ 500ns Tint + 5nV/√Hz 17µV (600ns) 12µV Integration time (ns) Input Noise (µV) 700 4.97 600 5.77 500 6.08 400 7.09 300 8.20 200 10.84 100 18.10 Power 28mW/channel Cross-talk ~0.02% Back end Board & Test Bench ASPIC 2 Room Temperature measurements