Reconfigurable Computing University of Arkansas

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Presentation transcript:

Reconfigurable Computing University of Arkansas Dr. Christophe Bobda CSCE Department University of Arkansas

On-line connection strategies Chapter 05 On-line connection strategies

Agenda Motivation Bus-based communication Communication via third party Circuit switching Approach The 1-D RMB-Model Network on Chip Introduction Drawbacks Dynamic Network on Chip Reachability of components and pins Routing approaches

1. On-line connection - Motivation Routing conscious temporal placement consider distance among components during placement However, implementation of a dynamic connection mechanism required for communication among components remains a puzzle Investigate existing approaches for solving the communication problem between components dynamically placed on and removed from the device: Bus-based approach Circuit routing Network on Chip approaches

BUS-based communication Reconfigurable Computing 5

2. BUS - oriented communication Many components connected at fixed locations One arbiter for BUS-Management SoC (System on Chip) Buses can be used to connect different modules ARM AMBA Advance high-performance bus (AHB) Advance peripheral bus (APB) IBM CoreConnect Processor local bus (PLB) On-chip peripheral bus (OPB) Silicore Whisbone Mod4 Mod 1 Mod2 Arbiter Mod3

2. BUS - oriented communication Using standard bus-arbiter Device is divided into slots Each task must be placed in a slot Each component implements the bus- transaction Each component can be a master An arbiter manages the bus-assignment OS-frame ICAP Decompessor Module 0 Module 1 Module 2 Module 3 Module 4 Quelle: ITIV, Uni Karlsruhe (TH) Control Mod Com Mod Com Mod Com Mod Com Mod Com Controller Com Master- Module Bus-Macro Quelle: ITIV, Uni Karlsruhe (TH)

3. Communication via third party Encapsulating the BUS-transaction in a wrapper (Brebner, Walder) Divide the device into slots Each task must be placed in a given slot A slot is enveloped in a wrapper which hides the bus-transaction process Communication takes place through a fixed module called the OS. Each module can send a message by writing in its send buffer The OS copies messages from the send buffers to the receive buffers of modules The receive modules reads its message from its receive buffer Inter Frame Communication Channels (IFCC) OS-frame task- slot task- slot task- slot task- slot

3. Communication via third party Communication with off-chip module is also done via the OS OS-frame

Reconfigurable Computing Circuit switching Reconfigurable Computing 10

4.1 Circuit Switching Architecture: Set of Processing elements Communication signals is set between two PEs using a set of switches on a path from the source to the destination Advantage: Direct communication. No need to process packets Drawbacks: Computing a route is expensive. Difficult to be done on-line Routed lines create a large amount of prohibited area Prohibited area can be overcome by using an extra layer exclusive for circuit routing Prohibited area

4.2 The reconfigurable multiple bus (RMB) approach A set of n processing elements and k segmented buses Crosspoints (switches) are used to set the connection between the segments at the run-time OS-frame Switches PE 1 PE 2 PE 3 PE 4 PE 5

4.2 The reconfigurable multiple bus (RMB) approach The sender always initiates and destroy a communication request Each communication path is granted until the end of the communication OS-frame PE 1 PE 2 PE 3 PE 4 PE 5

4.2 The reconfigurable multiple bus (RMB) approach On a column wise reconfigurable device, the RMB provides a modular communication infrastructure All the switches in one column are grouped together The separation of horizontal reconfigurable regions is done via bus macros OS-frame Bus macros PE 1 PE 2 PE 3 PE 4 PE 5

Packet-based communication Reconfigurable Computing 15

5.1 NoC (Network on Chip) – based communication A Network on Chip is made upon A set of processing elements A set of network elements also called routers Each PE is connected to a network element Each PE is assigned to the same address as its corresponding network element Communication is packet-based Each packet contains the destination address and some data Routers are used to forward packets in the right direction according to the destination address A router contains small logic. It may have some buffer for storage of packets in case of high traffic NoC Router

5.2 NoC (Network on Chip) – based communication Limitations of fixed NoC communication Fixed position for modules Larger modules must be splited Packet based Communication inside a component is not efficient Direct communication must be used on a module boundary We seek a network infrastructure which Allows Modules placed at a given location to use all the resources in their area changes according to the placement of modules on the device Each component always access other components and pins for communication A Dynamic network can be the solution

6.1 Dynamic Networks – DyNoC (Dynamic NoC) Architecture: like NoC architecture Set of Processing elements Set of network elements implementing a routers in their basic configuration Each PE is connected to a network element Direct communication among neighbour PEs Communication is packet-based Each packet contains the destination address and some data The ratio router size/module size must be kept small

6.1 Dynamic Networks – DyNoC (Dynamic NoC) Dynamism in the NoC Each module is represented as a rectangular box encapsulating a given function All resources (routers and PEs) in a placement area of a module is assigned to the module Therefore, the network logic should be flexible to be used as logic in a given module Upon completion, each module restores its routers in their basic configuration Up to a selected router, all the routers in the area of a component are no more accessible from the network Each placed component accesses the network using the router attached to it North-East (NE) PE Network varies with temporal placement of modules onto the device

6.2 DyNoC - Reachability Module and pins reachability A module (pin) is reachable iff all the messages sent to this module(pin) can reach their destination. We define the Component graph G = (V,E) as V is the set of components and pins An edge (u,v) belongs to E iff a path exists between u an v If G is strongly connected, then all components and pins are reachable This increase the architectural requirements

6.2 Dynamic Networks – DyNoC - Reachability Additional architectural requirements A ring of network element must be available around the chip The PEs at the chip boundary must be connected to the router at the chip boundary Each placed component accesses the network using the PE associated to it North-East (NE)PE Only PEs are allowed to be at the boundary of a component

6.2 Dynamic Networks – DyNoC – Reachability Theorem 1 (Bobda 2004): If each component is synthesized in such a way that it is internally surrounded only by processing elements, then each placement on the reconfigurable device is strongly connected. Proof: Assume that a set of components developed as required in the theorem and placed on the device is not strongly connected,then at least two components abut or one component abuts the device boundary. Consider case 1). Either the two components overlap Or one component uses some routers on its boundary. This lead to a contradiction

6.2 Dynamic Networks – DyNoC – Reachability Exemple of a feasible placement

6.3 Dynamic Networks – DyNoC – Routing Routing in Mesh without obstacles The XY-router Fast and Efficient Local decisive 5 inputs and 5 outputs channels Input-FIFO on each channel The router compares its address to the destination address of a packet If X-router < X-packet, packet is sent to east If X-router > X-packet, packet is sent to west If X-router = X-packet and Y-router < Y-packet, packet is sent to north If X-router = X-packet and Y-router > Y-packet, packet is sent to south If X-router = X-packet and Y-router = Y-packet, copy packet to local FIFO

6.3 Dynamic Networks – DyNoC – Routing The dynamic placement of components create obstacles in the network The routing must be able to recognize obstacles and be able to surround components. Vertical and horizontal obstacles are treated differently Obstacles

6.3 Dynamic Networks – DyNoC – Routing – S-XY Dealing with obstacles XY-Router Additional Activated signal to neighbours If the router is available control signal is high otherwise, it is low Component surrounding strategies are required The S-XY (Surround XY) router Operates in three modes The N-XY: Normal operating mode. The packets are routed according to the XY strategy The SH-XY: The router enters this mode when a horizontal obstacle is found The SV-XY: The router enters this mode when a vertical obstacle is found

6.3 Dynamic Networks – DyNoC – Routing – S-XY The SH-XY mode: Surrounding obstacles in the horizontal direction Routing Path 1 YDest > YRouter XDest < XRouter Obstacle XDest = XRouter YDest < YRouter Dest Component XDest = XRouter YDest = YRouter Routing Path 2 Stamp packets to avoid “ping-pong” game

6.3 Dynamic Networks – DyNoC – Routing – S-XY Surrounding obstacles in the vertical direction Place a stamp on packets to avoid a “ping-pong” game Ping pong game Obstacle Component Routing Path1 Routing Path2 Destination Component

6.3 Dynamic Networks – DyNoC – Routing – S-XY Theorem (Bobda 2005): The S-XY algorithm is deadlock free, i.e. Each packet will reach its destination after a finite number of steps. Proof: Exercise Prove that: Each component is reachable, i.e. a path is always available from source to destination A packet is never blocked in the network (Theorem 1) Since a packet can never be blocked this will happen only if a packet is looping aroung a component. Prove that this will never happen

D S 6.3 Dynamic Networks – DyNoC – Router Guiding The decision to left/right or up/down is arbitrary taken On worst case, the path can be very long To avoid this, consider guiding the router by the components C1 D C2 C3 C4 S Guided routing