A unified instruction and data cache

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Presentation transcript:

A unified instruction and data cache

Separate data and instruction caches

Direct-mapped cache organization

2-way set-associative cache organization

Fully associative cache organization

Summary of cache organizational options

‘Perfect’ cache performance

Unified cache performance as a function of size and organization

The effect of associativity on performance and bandwidth requirement

ARM3 cache organization

ARM600 cache control state machine

Segmented memory management scheme

Paging memory management scheme

The operation of a translation look-aside buffer