High Current V-I Circuits (Using External Transistors) Tim Green, Art Kay, John Brown

V-I Circuits Using External Transistors Choosing the Transistor Power Dissipation Considerations Traditional Floating Load Circuit Novel V-I Using Opposite Polarity Transistor

Example: OPA335 and Bipolar Transistor Supply: 5V Utility Gain Buffer Output Swing: 0V to 5V Load: 20ohm (250mA max) How do we choose the BJT?

Bipolar Junction Transistor (BJT) NPN Base Collector Emitter PNP Base Collector Emitter

Design Process for Selecting Transistor Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved. 1. Power – the maximum power that a transistor can dissipate is a primary concern. This is closely related to the Package used. 2. Collector Current – the maximum collector current is often a limiting factor when selecting a transistor. 3. Base Current – this current is typically supplied by the Op-Amp output and can be large for power devices. 4. Vceo (Collector to Emitter Break Down Voltage) – This voltage is typically large (Vceo > 50V). So, this parameter is most important for high voltage consideration. 5. Vbe (Base to Emitter Voltage) – This voltage drop can be significant in low voltage considerations.

Simple Rule of Thumb Calculations Power / Package Collector Current Base Current Vceo (Collector to Emitter Break Down Voltage) Vbe (Base to Emitter Voltage) 1. Power – the maximum power that a transistor can dissipate is a primary concern. This is closely related to the Package used. 2. Collector Current – the maximum collector current is often a limiting factor when selecting a transistor. 3. Base Current – this current is typically supplied by the Op-Amp output and can be large for power devices. 4. Vceo (Collector to Emitter Break Down Voltage) – This voltage is typically large (Vceo > 50V). So, this parameter is most important for high voltage consideration. 5. Vbe (Base to Emitter Voltage) – This voltage drop can be significant in low voltage considerations.

DC Power Dissipation When is there maximum power in the output transistor? DC Signal P

AC Power Dissipation When is there maximum power in the output transistor? AC Sinusoidal Signal P

Maximum Power in the External Transistor Use the DC Maximum Power Dissipation for Worst Case Double the power for margin over temperature

Characteristics of Different Package Types MaxPower TA = 25C No heat sink MaxPower TA = 85C MaxPower TC = 25C RθJA 1in2 pad RθJC SOT-23 0.3 0.15 1 400 250 --na-- SOT-223 0.75 0.4 3 175 80 DPAC IPAC 1.5 0.65 20 100 50 6.25 TO-220 2 62.5 2.78 TO-3 4.2 2.2 30 1.25 For our example

Different Package Types SOT-223 TO-3 IPAK SOT-23 DPAK TO-220

Simple Rule of Thumb Calculations Power / Package Collector Current Base Current Vceo (Collector to Emitter Break Down Voltage) Vbe (Base to Emitter Voltage) 1. Power – the maximum power that a transistor can dissipate is a primary concern. This is closely related to the Package used. 2. Collector Current – the maximum collector current is often a limiting factor when selecting a transistor. 3. Base Current – this current is typically supplied by the Op-Amp output and can be large for power devices. 4. Vceo (Collector to Emitter Break Down Voltage) – This voltage is typically large (Vceo > 50V). So, this parameter is most important for high voltage consideration. 5. Vbe (Base to Emitter Voltage) – This voltage drop can be significant in low voltage considerations. We’ve looked at Power. Now let’s investigate current.

Max Collector Current in the External Transistor The OPA335 is a “rail-to-rail” out Vout_max = Vopa_max – Vbe = 5V – 0.6V = 4.4V Max Output Current = (Vout_max)/RL =4.4V / (20Ω) = 220mA Add 20% margin Ic_max rating > (220mA)(1.5) = 330mA

Maximum Base Current in the External Transistor Standard BJT Power Transistor: Typical hfe_min = 20. Base Current = Ic_max / hfe_min = 220mA / (20) = 11mA (too high) Use a Darlington. Typical minimum hfe_typ = 1000. Base Current = Ic_max / hfe_min = 220mA / (1000) = 220uA (good) Darlington Use less than 2mA for good swing to the rail.

Simple Rule of Thumb Calculations Power / Package Collector Current Base Current Vceo (Collector to Emitter Break Down Voltage) Vbe (Base to Emitter Voltage) 1. Power – the maximum power that a transistor can dissipate is a primary concern. This is closely related to the Package used. 2. Collector Current – the maximum collector current is often a limiting factor when selecting a transistor. 3. Base Current – this current is typically supplied by the Op-Amp output and can be large for power devices. 4. Vceo (Collector to Emitter Break Down Voltage) – This voltage is typically large (Vceo > 50V). So, this parameter is most important for high voltage consideration. 5. Vbe (Base to Emitter Voltage) – This voltage drop can be significant in low voltage considerations. Now let’s investigate voltage ratings.

BJT Breakdown Voltages Max voltage across any junction is 5V Most transistor breakdown > 50V Add a protection resistor in the base Limit base current Provide Capacitive Isolation

Design Process Here is the are the results of the rule of thumb calculations Power Rating > 225mW Package Type: SOT23 Ic_max rating > 330mA Type: Darlington NPN Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved. Using Digikey parametric search Narrow from 4638  8 transistors. Using the above results and Digikey parametric search, we can narrow the search from 4638 transistors to 8 transistors. Of the 8 we select the least expensive.

Parametric Search Results The result of the Digikey parametric search. We choose the least expensive one MMBT6427 @ $0.104.

Design Process Now we verify if our choice will really work! Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved. Now we verify if our choice will really work!

MMBT6427 Data Sheet Ic_max= 220mA (lots of margin) Look at the “Maximum Ratings” No problem -- were working with 5V. Ic_max= 220mA (lots of margin)

Maximum Power / Junction Temperature Maximum power dissipation dictates device (junction) temperature Device temperature is also effected by -- Ambient temperature -- Package Type (Data specifications) -- Heat sink -- Air flow

Maximum Power / Junction Temperature MMBT6427 Transistor Power_Maximum = 112.5mW Rule of thumb: double Power_Maximum. Power_Rating > 225mW (edge of Spec) Are we ok?

Look at Thermal Model Thermal model with no heat sink Analogous to an electrical circuit TJ= PD( RθJA) + TA T – is analogous to voltage R – is analogous to resistance P – is analogous to current

Use the Thermal Model Assuming TA = 25oC TJ = PD( RθJA) + TA = (112.5mW)(556oC/W) + 25oC = 87.5oC What is the maximum ambient operating temperature? Tmax_ambient = 150oC – 62.5oC = 87.5oC (Enough margin?)

Side Note Thermal Model for the Heat Sink TJ = PD( RθJC + RθCS + RθSA) + TA PD – The power dissipation of the transistor TJ – The junction temperature TC – The case temperature TS – The heat sink temperature TA – The ambient temperature

Here is the Mechanical Description Case RθCS RθJC RθSA Heat Sink Ambient Junction

T= PD( RθJC + RθCS + RθSA) + TA Junction to Case – RθJC T= PD( RθJC + RθCS + RθSA) + TA Typical Transistor in a TO220 Package

Case to Sink – RθCS T= PD( RθJC + RθCS + RθSA) + TA

T= PD( RθJC + RθCS + RθSA) + TA Sink to Ambient – RθJC T= PD( RθJC + RθCS + RθSA) + TA Example Heat Sink

T= PD( RθJC + RθCS + RθSA) + TA Sink to Ambient – RθJC T= PD( RθJC + RθCS + RθSA) + TA Natural Convection is 100 Feet /min

Back To The Example Detailed Analysis So Far Breakdown Voltages Ic_max Power / Junction Temperature VBE / Output Swing IB / Op-Amp Drive Another consideration with this design is the base to emitter voltage drop (VBE). This voltage directly impacts the output swing of the buffer circuit. Vout_buffer_max = 5V – 1.4V = 3.6V Note that the large base to emitter voltage is a major disadvantage of the Darlington configuration (it’s actually two diodes in series).

Output Swing (Consider Vbe) Vout_buffer_max = 5V – 1.4V = 3.6V Disadvantage of the Darlington MMBT6427 Transistor 1.4V 250mA Darlington Another consideration with this design is the base to emitter voltage drop (VBE). This voltage directly impacts the output swing of the buffer circuit. Vout_buffer_max = 5V – 1.4V = 3.6V Note that the large base to emitter voltage is a major disadvantage of the Darlington configuration (it’s actually two diodes in series). 1.4V

(Consider Vbe over Temperature) Output Swing (Consider Vbe over Temperature) Typical ΔVbe = -2mV/oC At -25oC ΔVbe = (-2mV/oC)(T – Troom) ΔVbe = (-2mV/oC)(-25oC – 25oC) = 0.1V Vbe = 1.4V + 0.1V = 1.5V At 85C Vbe = 1.4V - 0.12V = 1.28V Another consideration with this design is the base to emitter voltage drop (VBE). This voltage directly impacts the output swing of the buffer circuit. Vout_buffer_max = 5V – 1.4V = 3.6V Note that the large base to emitter voltage is a major disadvantage of the Darlington configuration (it’s actually two diodes in series).

What’s the Real Output Swing? What’s the Real Max Current Out? Iout_max Estimate: Iout_max = Vout/RL = 5/20 = 250mA From the Graph: Vbe = 1.4V Refine Iout_max: Iout_max = (Vout – Vbe)/RL = (5 -1.4)/20 = 180mA Refine Vbe: Vbe = 1.37V MMBT6427 Transistor 1.4V 250mA 180mA 1.37V

Is the Base Current Okay? MMBT6427 Transistor Worst Case hfe = 2.7k Ib_max = Ic_max / hfe_min Ib_max = 250mA / 2700 = 92.5uA (no problem)

Summary of Buffer Design Using Bipolar Transistor Spec. Design Worst Case Transistor Data Sheet Rating Comment Max Current 250mA 500mA Max Vbe 1.5V Limits the buffer output swing to 3.5V Max Ambient Temperature 87.5C Determined using power dissipation and the thermal model. Ib – Max Base Current 92.5uA Vce 5V 40V Vcb 5

Recall Bipolar Junction Transistor (BJT) Collector Base NPN Emitter PNP Base Collector Emitter

What about design using Power MOSFETS? N-Channel Gate Drain Source P-Channel Gate Drain Source

Power MOSFET vs Power BJT Voltage to Current device – no gate current Vgs depends on transistor and Id Vgs typically ranges 2V to 10V Power BJT Current to Current I device – base current significant Vbe = 0.7V for standard Vbe = 1.4V for Darlington Design process for MOSFET similar to BJT

Two Different Topologies Current Sources Design Example Two Different Topologies New Topic Traditional Floating Load Inverted Transistor Floating Load Easy To Stabilize Headroom Limited by VBE (VGS) Bandwidth Limited By Load More Difficult to Stabilize More headroom than “Traditional” Wider Bandwidth than “Traditional”

Standard Floating Load Current Source with BJT Current Boost Vin = VG1*1k/(1k+9k) Vin = 0.1VG1 LOAD Vrsen = Vin I_load = Vrsen/Rsen + Vrsen - Sense Resistor

Traditional Floating Load Current Source DC Analysis Series Resistor Limits Base Current and Isolates Op-Amp From Capacitance. Asymmetrical supplies Increased output swing  faster di/dt LOAD + Vrsen - Sense Resistor

DC Analysis of Transistor BD675 Spec Design Worst Case Transistor Data sheet Ib max 1.5A/750 = 2mA hfe_min = 750 Op-Amp Swing 25 – 1.0 = 24V @125C 25 – 1.5 = 23.5V @-25C Output Swing BJT 24 – 2.4 = 21.6V @125C 23.5 – 2.6 = 20.9V @-25C Iout Max 21.6V/15 = 1.39A @125C 20.9V/15 = 1.39A @-25C Icmax=4A Pmax (25)2/(4*15)=10.12W --see Tj -- Ta max 76.5C (Ta max> 60C) Tj @ Ta=60C =Pd(Rjc + Rjs + Rsa) + Ta =10.12W(3.13 + 0.44 + 3.7) + 60 =133C Tjmax=150C (Using heat sink)

AC Stability Analysis Add in the test circuitry Short out the signal source

Before Tina SPICE Do a Hand Analysis This section is a simple buffer Find 1/β by looking at the feedback path. 1/ β = Vtest/Vfb

Before Tina SPICE  Do a Hand Analysis Replace the buffer with a wire, and analyze as a series circuit.

High and Low Frequency Extremes Hand Analysis of β (1/β) High and Low Frequency Extremes β Transfer Function

Using Information from the Transfer Function 33dB 16Hz 20dB/dec Problem 40dB/dec rate-of-closure 1/β Curve AOL

Using Information from the Transfer Function Add another feedback path to stabilize the circuit. This circuit’s 1/β plot. How will the two feedbacks combine?

How will the two feedbacks combine? Large β Answer: The largest β (smallest 1/β) will dominate! Small β

General Example: How would the red and blue curves add General Example: How would the red and blue curves add? Remember curves shown are 1/β curves, not β curves!

General Example: How would the red and blue curves add General Example: How would the red and blue curves add? Remember that the curves shown are 1/β curves, not β Curves! The combined feedback will follow the smallest 1/β curve (the larges β).

How to Select FB#2 to Stabilize the Circuit 1decade Move the FB#2 curve up or down until there is 1 decade margin between the AOL curve and the intersection with the FB#1 curve. Set the cut frequency so that there is one decade margin before the intersection of FB#1 and FB#2.

How to Select FB#2 to Stabilize the Circuit Stable The combination of FB#1 and FB#2 has a 20dB/decade rate-of-closure.

How to Separate the Two Paths Break the FB#1 path here!

Solve for β β

Plot for 1/β

Values Required for this Example f = 15Hz, High Freq 1/β = 50dB FB#2 FB#1 1decade f = 15Hz High freq 1/β = 50dB

Using f = 15Hz, High Freq 1/β = 50dB Solve for Rd and Cf

Verify Stability Using Tina-SPICE Plenty of phase margin Worst Case 45o

Look at Transient Response Using Tina-SPICE

Look at Transient Response Using Tina-SPICE

The AC Transfer Function Using Tina-SPICE Phase(Iout/Vin) Mag(Iout/Vin) -3dB -45o

Two Different Topologies Current Sources Design Example Two Different Topologies Traditional Floating Load Inverted Transistor Floating Load Easy To Stabilize Headroom Limited by VBE (VGS) Bandwidth Limited By Load More Difficult to Stabilize More headroom then “Traditional” Wider Bandwidth then “Traditional” Done with the traditional floating load Lets look at the inverted topology.

Inverted Transistor Floating Load DC Analysis Gate Source Drain Common source configuration. Vgs does not effect headroom.

Inverted Transistor Floating Load DC Analysis Zener protects gate from over voltage. Resistor Isolates Op-Amp from Gate Capacitance

Inverted Transistor Floating Load AC Analysis Add test circuit DC Bias Required for proper functionality

Stability Analysis of Inverted Transistor Floating Load Circuit with No Compensation Note the Complex Conjugate zero (180o phase shift). 60dB Rate of Closure

Add a Zero into Feedback Path Cin MOSFET

Add a Zero into Feedback Path Select f=100Hz so that the zero occurs before the complex conjugate.

AC Stability Result Zero In Feedback Note: The complex conjugate zero is gone. Loop Gain=0 Phase margin < 0

Use another Feedback Path FB#2 will dominate at high frequencies FB#2

Use another Feedback Path 20dB/dec 0dB

Hand Calculations for New Feedback Path β

Hand Calculations for New Feedback Path fc = 1kHz In this example 20dB/dec 0dB

Hand Calculations for New Feedback Path We want to set the cut frequency at about 1kHz FB#2

Final Compensation: Look at AC Stability

Final Compensation: Look at AC Stability The composite 1/β is relatively flat for all significant loop gain. Plenty of phase margin (65deg)

Final Compensation: Look at Transient

Final Compensation: Look at Transient

The AC Transfer Function Using Tina-SPICE

Current Sources Design Example Summary Traditional Floating Load Inverted Transistor Floating Load Easy To Stabilize Headroom Limited by VBE (VGS) Bandwidth Limited By Load More Difficult to Stabilize More headroom then “Traditional” Wider Bandwidth then “Traditional” For the example: Vout Swing Max = 20.9V Bandwidth = 100Hz (Bandwidth is maximized) For the example: Vout Swing Max = 24.65V Bandwidth = 800Hz (This could be compensated for wider bandwidth)