Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: A schematic representation of a 3D IC cooled with a coolant layer

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: A schematic of a three layer 3D IC structure with an external heat sink. Redrawn from Ref. [2].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: A schematic representation of a microchannel cooled three layer 3D IC structure. Microchannels can be employed in both single phase and two-phase (evaporative) modes. Redrawn from Ref. [24].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: Cross sectional view of the copper TSV passing through a silicon microchannel wall. Microchannel width 150 μm, height 200 μm, and TSV diameter 50 μm. Reprinted with permission from Sekar et al. [29].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: Microchannels on a silicon chip glue bonded to a glass cover plate. Reprinted with permission from Dang et al. [30].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: SEM micrographs showing polymeric micropipes adjacent to solder bumps. Reprinted with permission from Dang et al. [30].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: Schematic of a proposed 3D IC stack cooled with microchannels with fluidic and TSV interconnects. Redrawn with permission from Dang et al. [30].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: Schematic representation of through-plane microchannels between two coolant layers to cool hot spots. Redrawn with permission from Kearney et al. [58].

Date of download: 3/4/2018 Copyright © ASME. All rights reserved. From: Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits J. Electron. Packag. 2014;136(2):024001-024001-11. doi:10.1115/1.4027175 Figure Legend: A conceptual 3D module with multiple microchannel cooling and active layers integrating wireless and TSV interconnects