802.16m Downlink Interlaced Pilots Link Level Simulation Results

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802.16m Downlink Interlaced Pilots Link Level Simulation Results Document Number: IEEE C80216m-09_0026 Date Submitted: 2009-01-05 Source: Furuzan Atay, Huaning Niu, Jong-Kae (JK) Fwu, Yuval Lomnitz, Jiacheng Wang, Hujun Yin, Sassan Ahmadi Email: jong-kae.fwu@intel.com Venue: IEEE Session #59, San Diego. Base Contributions: N/A Re: 802.16m-08/052, Call for Comments on 802.16m SDD (802.16m-08/003r6), Section 11.5.3 Pilot Structure Purpose: For TGm discussion and adoption of 802.16m SDD text Notice: This document does not represent the agreed views of the IEEE 802.16 Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE 802.16. Patent Policy: The contributor is familiar with the IEEE-SA Patent Policy and Procedures: <http://standards.ieee.org/guides/bylaws/sect6-7.html#6> and <http://standards.ieee.org/guides/opman/sect6.html#6.3>. Further information is located at <http://standards.ieee.org/board/pat/pat-material.html> and <http://standards.ieee.org/board/pat >.

Outline Part I: Simulation results for spectral efficiency of interlaced pilot versus non-interlaced pilots without Interference Cancellation Part II: Simulation results for spectral efficiency of interlaced pilot versus non-interlaced pilots with Interference Cancellation Part III: Additional results for PER of interlaced pilot versus non-interlaced pilots with Interference Cancellation

Part I: Interlace Pilot Gain – Without Interference Cancellation

Simulation Parameters INR = 10 dB, 2 interferers (1:1), full/half loading 2-D MMSE channel estimation Pilot pattern based on current SDD text Channel – Ped-B 3km/h Pilot boosting scenarios for interlaced pilot: 7/5 dB for SM2 5/3 dB for SIMO 1x2

2x2 SM, No IC, Full Loading, SE Interlaced 5dB boosting has the best performance Need 3dB boosting SM for non-interlaced

2x2 SM, No IC, Half Loading, SE Interlaced pilot enjoys larger gain at partial loading

2x2 SFBC, No IC, Full Loading, SE

2x2 SFBC, No IC, Half Loading, SE

1x2 SIMO, No IC, Full Loading, SE

1x2 SIMO, No IC, Half Loading, SE

Conclusion Interlace pilot enjoys better SE than non-interlaced pilot particularly at low SINR Interlace gain in partial loading case is significant Suggested boosting value: 5dB boosting value for 2 SM (net 2dB boosting combining two streams) 3dB for 1 stream

Part II: Interlace Pilot Gain – With Interference Cancellation

Interference Scenario Two interfering basestations, BS2 and BS3 Noise + interference is to be pre-whitened based on estimated covariance of Interference + Noise Covariance matrix is estimated using pilots (6 pilots per Tx antenna) within one PRU

Interference Cancellation (IC) Description For each subcarrier j, Filter the signal with before MMSE demodulation is the channel estimation error for subcarrier j Interference Cancellation : First estimate pilot channel H1 and then calculate

Simulation Parameters INR = 10 dB, 2 interferers (1:1), full/half loading 2-D MMSE channel estimation Pilot pattern based on current SDD text Channel – Ped-B 3km/h Pilot boost: 5 dB for SM2 and SFBC 3dB for SIMO 1x2

2x2 SM, With IC, Full Loading, SE

2x2 SM, With IC, Half Loading, SE

2x2 SFBC, With IC, Full Loading, SE

2x2 SFBC, With IC, Half Loading, SE

1x2 SIMO, With IC, Full Loading, SE

1x2 SIMO, With IC, Half Loading, SE

Conclusion Interlace pilot enjoys better SE than non-interlaced pilot with interference cancellation in all cases

Part III: Additional Results -Interlace Pilot Gain with Interference Cancellation

Additional Results I Constant SIR, 2 Interferers (1:1) 2-D MMSE channel estimation Pilot pattern based on current SDD text Channel – Ped-B 3km/h Scenario 1: SIMO 1x2, QPSK ½, SIR = 3dB, Full/half loading Scenario 2: SIMO 1x2, 16QAM ½, SIR = 10dB, Full/half loading

SIMO 1x2, QPSK ½, SIR = 3dB Half loading Full loading Pilot Pattern 0: non-interlaced pilots. Pilot pattern 1: interlaced pilots.

SIMO 1x2,16QAM ½, SIR = 10dB Full loading Half loading

Conclusion Interlace pilot out-perform non-interlaced pilot in different SIR settings with/without interference cancellation

Text Change (1/2) In IEEE 802.16m-08/003r4 Section 11.5.3, replace “The interlaced pilot patterns can be generated by cyclic shifting the base pilot pattern. The interlaced pilot patterns are shown in Figure 33 and can be optionally used by different BSs. The use of interlaced pilot pattern is FFS. …” with “For 1 and 2 data streams, BSs use interlaced pilot patterns. The interlaced pilot patterns are generated by cyclic shifting of the base pilot pattern. The interlaced pilot patterns are shown in Figure 33 and are used by different BSs. Each BS chooses one of the pilot pattern in Fig. 33. The index of the pilot pattern used by a particular BS is determined by its Cell_ID according to the following equation: interlaced_pilot_index_k = mod(Cell_ID,3) ”

Text Change (2/2) Fig. 33: caption: (a) k=0, (b) k=1, (c) k=2 Interlaced pilot patterns for 1/2 streams

Backup Slides

Additional Results for higher MCSs INR = 10 dB, 2 interferers (1:1) 2-D MMSE channel estimation Pilot pattern based on current SDD text Channel – Peb-B 3km/h Scenario1: SIMO 1x2 Desired Signal: 16 QAM ½ Interfering Signals: 16 QAM Scenario2: SIMO 1x2 Desired Signal: QPSK ½ Interfering Signals: 64 QAM

SIMO 1x2, PER for 16QAM/16QAM 2 Interferers (1:1), Desired BS – 16QAM ½, Interfering BSs – 16QAM

SIMO 1x2, PER for QPSK/64QAM 2 Interferers (1:1), Desired BS – QPSK ½, Interfering BSs – 64QAM

Conclusion Interlace pilots out-perform non-interlaced pilots when the interfering signals use higher constellation.

Simulation Results for 1-stream, No Pilot Boosting

1 stream: eITU PB3, 1x2, No pilot boosting

1 stream: eITU VA120, 1x2, No pilot boosting

1 stream: eITU VA350, 1x2, No pilot boosting