SPS BPM system renovation Roadmap & Milestones

Synopsis Introduction and Overview: Andrea Infrastructures Electronics Fibres: Simao Cables: Joel Electronics Analogue Front-End: Manfred Digital Front-End: Manoel Back-End: Andrea GW: Andrea & Manoel SW: Athanasios Integration and commissioning: Andrea

Introduction MOPOS (Multi Orbit POsition System) 228 BPMs in 216 locations (12 double planes) System obsolescent Cables’ continuous degradation requires recalibration and replacements Too many gain stages Need to set the gain before the injection ALPS (A Logarithmic Position System) Based on BI new standard boards Digitalization in the tunnel (rad-tolerant design needed) Use of Logarithmic amplifiers to compress the dynamic range 3 sensitivity ranges, but acquired in parallel

Overview: ALPS The original plan Extensive tests in 2017 Commissioning in parallel to MOPOS in 2018

Overview: ALPS What happened in 2016 The last prototype tested in November 2016 Met the resolution requirements Could not cover the full dynamic range The radiation working group reviewed the radiation distribution and levels

Fibres: Simao

Cables: Joel

Arcs & LSS: Short coaxial cables RG 58 coaxial cables. 1000 cables (1.2m to 10m) Delivery in progress (today ~ 700@ CERN, 100% for the end of the year). Due to quality problems in the past (assembly of the connector, manufacturer side) we proceed to a reflectometry test for a lot of them. installation at the same time with front end electronic.

Straight sections: Long coaxial cables CMC 50 coaxial cables.(20m up to 160m) Remains to be installed : TS2 Left (-). 12 cables. Expected during LS2. Reflectometry test by BI/QP to be done during YETS

Analogue FE: Manfred

ALPS RF Frond-end Layout (1 Ch.) BPM Not shown: Output stages Anti-aliasing LPF Details of the CAL system Absorptive LPF X-bar switch 2x per plane Log Amps To ADC channels 6 dB coupler Hairpin BPF 6 dB coupler 20 dB coupler diode limiter high sensitivity range: -45…-5dBm 3…50 m coaxial cable IN ext. RF PCB DOROS OUT 20 dB coupler medium sensitivity range: -25…15dBm CAL signal CTRL PWR low sensitivity range: -5…35dBm Main RF Front-end PCB Logic I/O Log Σ-signal

Required Hardware – Status Nov. 2017 500x absorptive 400 MHz low-pass filter & impedance matching section Directly connected (no cables!) to the BPM pickup electrodes Reuse of already manufactured housings Need minor modifications PCB layout finalized, ready for prototype manufacturing All filters need to be characterized (S-parameter measurement) and matched in pairs Version with 3 dB power splitter for sextant test MOPOS and ALPS can run in parallel 250x X-bar relay switch For calibration purposes 500x 200 MHz hairpin band-pass filter PCB layout for 10 MHz BW prototype filter is finalized Quote for prototype manufacturing (10 units) at hand Rogers substrate and prepreg are ordered, expected delivery end of November 250x main RF front-end PCB Design is finalized Schematics for prototype manufacturing ready for final review Majority of electronics components in house Need radiation tests for a few new RF components, all GaAs HEMT technology, no surprises expected

Milestones 2018 A-FE design frozen Prep cables in SPS for sext. test rad. tolerance verification of new RF components (in CHARM) 2017 September December 2018 November 2019 February March June May A-FE prototypes (10) Installation of 2 A-FE and D-FE in BA4 End of validation with beam of the A-FE Installation of 36 systems (1 sextant) – need 1 day min. A-FE Layout review and approval Start of production A-FE V2 (40) End of qualification with beam A-FE design frozen Procurement of missing electronics components Development of a verification and calibration test system

Milestones LS2 Calibration test stand fully operational 2019 2020 2021 February January March June Production start Pre-production batch End of production End of modules tests Calibration test stand fully operational Characterization of all 200 MHz BPFs Pair matching of the filters

Remarks The R&D of the RF front-end electronics experienced some major delays! Lab and beam test showed that the prototype electronics could not fulfill all requirements Lead engineer retired, switch of manpower in Spring 2017 The 200 MHz band-pass filter is mission critical! Filters with 5 and 7.5 MHz bandwidth will be developed as alternative to the 10 MHz baseline design Pro: This will improve the single bunch response (longer ringing) Con: This will reduce the signal level sensitivity (less energy) In-house manufacturing coordination The main RF PCB manufacturing will be coordinated by Betty and her team RF and exotic electronics components will be provided by BI-QP Most (but not all) components are already in-house for full quantity production Check out of the hardware Filters will be characterized with a VNA Followed by pair matching Main RF PCB requires a fully automatized calibration test stand Control and DAQ using the digital front-end Signal generation with RF/pulse-generator and precision step attenuators (in procurement)

Digital FE: Manoel

Digital FE Bpm Digital Front-end (BDF) ALPS specific rad-hard ADC-based board Digitizes the analogue signals from the ALPS Analogue Front-End Status: Already in production stage: 228 operational, 42 spares Components for 200 more in stock Gbt-based Expandable Front-End (GEFE) Standard rad-tolerant digital Front-End card for BI projects Interfaces the ALPS Front-End electronics with the Back-End Status: 40 pieces already produced for a sextant… Production foreseen for 228 operational, 42 spares Components in stock for 80 more boards … but redesigned due to changes in the expected radiation levels

Digital FE: the Split GEFE (S-GEFE) The Split GEFE (S-GEFE) is an evolution of the GEFE board: Provides the same functionality but split in two boards: Link GEFE (L-GEFE): Mezzanine card featuring exotic components from CERN EP Carrier GEFE (C-GEFE): Carrier card featuring COTS components The L-GEFE and C-GEFE may be used independently: The L-GEFE is rad-hard by design up to TID levels of MGy The C-GEFE is rad-tolerant up to TID levels of 750 Gy Status: S-GEFE First two prototypes already ordered +

End 2017 – 2018: Digital FE roadmap to LS2 2019 November February October March April July Finish S-GEFE design Launch S-GEFE production Test S-GEFE prototypes Receive BDF production Finish BDF production test Receive S-GEFE production Finish S-GEFE production test

Back-End: Andrea

Status in October 2017 – VFC-HD 75 boards to produce for ALPS (1 process 4 BPMs) 57 operational – 18 spares BI will produce 900 boards: contract to be awarded in December Test performed during production at the assembly premises 4 boards already available for the project

End 2017 – 2018: VFC roadmap to LS2 2017 2018 2019 December December January May Finalisation of the test bench 10+ more boards assigned to ALPS Full production start Reception of last production batch

GW: Manoel & Andrea

Status in October 2017 – FPGA code (GW) GEFE (Front-End): Up transmission: done Calibration interface: to be defined Porting from GEFE to L&C-GEFE: to be done (pin assignment) VFC (Back-End): Communication with the analogue FE: done Memory map already defined Orbit, Injection Trajectory, and Capture modules: done FIFO module: to be done Data storing in the large external memory (DDR3): to be done Interlock process module: to be done (functionality to be rediscussed)

L&C GEFE Production test GW End 2017 – 2018: GW roadmap to LS2 2017 2018 2019 December February January March May L&C GEFE Production test GW VFC Production test GW DDR3 Interface Porting to L&C GEFE FIFO & Calibration Time available for tuning to the beam conditions

SW: Athanasios

Status in October 2017 - SW FESA SW and Expert GUI for qualifying the analogue front-end

End 2017 – 2018: roadmap to LS2 - SW 2017 2018 2019 September December February January March May Final Memory Map Encore Driver C/C++ Wrapper simulation functionality Stand-alone testers Operational API agreement FESA SW available Expert GUI available

Integration and commissioning: Andrea

Integration, Installation, and Tests in 2018 Qualification of the A-FE with beam GW/SW algorithms’ tuning and Integration tests Sextant test 2017 2018 2019 September December February March May July Receive S-GEFE production A-FE prototypes (10) Expert GUI available GW available Receive BDF production FESA SW available 40 more AFE available 10+ VFC assigned to ALPS Received last VFC

Integration, Installation, and Tests in LS2 2019 2020 2021 September February February April End of Tunnel Installation End of dry commissioning End of commissioning with Beam Installation of the Back-End GW/SW integration test with simulated data (depending on controls’ infrastructure availability) End of A-FE tests

Integration, Installation, and Tests in LS2 Readiness assessment and SPS recommissioning plans 2018 2019 2020 2021 September February February April End of Tunnel Installation End of dry commissioning End of commissioning with Beam Installation of the Back-End GW/SW integration test with simulated data (depending on controls’ infrastructure availability) End of A-FE tests

Integration, Installation, and Tests in LS2 Readiness assessment and SPS recommissioning plans Option to restart with MOPOS 2018 2019 2020 2021 September February February April End of Tunnel Installation End of dry commissioning End of commissioning with Beam Installation of the Back-End GW/SW integration test with simulated data (depending on controls’ infrastructure availability) End of A-FE tests

Summary There are delays on the original schedule due to Analogue front-end redesign required after the tests with beam of 2016 Digital front-end redesign required after changes in the expected radiation distribution and levels Extensive simulation shows that the redesigned A-FE will meet the requirements The integration test on a full sextant from September 2018 to LS2 There is the possibility to install ALPS in parallel to MOPOS Faster SPS recommissioning BUT CO should keep support for LynxOs!