計 算 機 結 構 國立清華大學資訊工程系 黃婷婷教授.

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計 算 機 結 構 國立清華大學資訊工程系 黃婷婷教授

為什麼電腦不用十進位而用二進位?

Signal: Two States (二進制) 對、錯 本土化、非本土化 陰、陽 high、low 正、反 勝、負 真、偽 2

Switch (電子開關) “gate” as the switch 3

A Working Transistor (1/5) Transistors consist of three terminals; the source, the gate, and the drain: 4

A Working Transistor (2/5) In the n-type transistor, both the source and the drain are negatively-charged and sit on a positively-charged well of p-silicon. 5

A Working Transistor (3/5) When positive voltage is applied to the gate, electrons in the p-silicon are attracted to the area under the gate forming an electron channel between the source and the drain. 6

A Working Transistor (4/5) When positive voltage is applied to the drain, the electrons are pulled from the source to the drain. In this state the transistor is on. 開 7

A Working Transistor (5/5) If the voltage at the gate is removed, electrons are not attracted to the area between the source and drain. The pathway is broken and the transistor is turned off. 關 8

相關電壓電流特性 及電路分析等知識 我們是在___課中介紹的 答:「電子電路學」「超大型積體電路設計」 9

有了開關就可以做邏輯閘 CMOS NAND: 10

Switch (電子開關) “gate” as the switch 3

有了邏輯閘就可做邏輯電路 加法器: A B A CO B Cl S A Cl B 11

也可以做記憶元件 可存一個bit的東西: R R' Q clock' Q' S' S 12

這部份的學問叫____ 答:「數位邏輯設計」 13

最後,電腦的主要部份就都可以做了 暫存器 記憶體 控制器 控制信號 ALU N Z clock IR PC 15

Basic Organization of Any Computer Keyboard, Mouse Computer Processor (active) Memory (passive) (where programs, data live when running) Devices Disk (where programs, data live when not running) That is, any computer, no matter how primitive or advance, can be divided into five parts: 1. The input devices bring the data from the outside world into the computer. 2. These data are kept in the computer’s memory until ... 3. The datapath request and process them. 4. The operation of the datapath is controlled by the computer’s controller. All the work done by the computer will NOT do us any good unless we can get the data back to the outside world. 5. Getting the data back to the outside world is the job of the output devices. The most COMMON way to connect these 5 components together is to use a network of busses. Control (“brain”) Input Datapath (“brawn”) Output Display, Printer 16

Computer Organization Capabilities and performance characteristics of principal functional units, e.g., registers, ALU, shifters, ... Ways in which these components are interconnected (structure) Information flows between components (data, datapath) Logic and means by which such information flow is controlled (control logic) Register Transfer Level (RTL) description Deeper view. Design state of art organization in 1990. This is only the computer organization. What is computer architecture ? 17

What is Computer Architecture? Computer Architecture = Instruction Set Architecture + Machine Organization I/O system Processor Compiler Operating System (MS Windows) Application (IE) Digital Design Circuit Design Datapath & Control Transistors Memory Hardware Software Assembler Instruction Set Architecture Machine Organization 18

Instruction Set as a Critical Interface Coordination of many levels of abstraction software instruction set hardware Does it have to be hardware? 19

Another Perspective temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; High Level Language Program Compiler lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) Assembly Language Program ISA Assembler Machine Language Program 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK ° 20

Instruction Set Architecture (ISA) “... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls, the logic design, and the physical implementation.” — Amdahl, Blaaw, and Brooks, 1964 Organization of Programmable Storage Data Types and Data Structures: Encodings and Representations Instruction Set Instruction Formats Modes of Addressing and Accessing Data Items and Instructions Exceptional Conditions SOFTWARE 21

MIPS R3000 ISA Instruction categories: Load/Store Computational Registers Instruction categories: Load/Store Computational Jump and Branch Floating Point coprocessor Memory Management Special R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rt rd sa funct OP rs rt immediate OP jump target 22

Example ISA Digital Alpha (v1, v3) 1992-97 HP PA-RISC (v1.1, v2.0) 1986-96 Sun Sparc (v8, v9) 1987-95 SGI MIPS (MIPS I, II, III, IV, V) 1986-96 Intel (8086,80286,80386, 1978- 80486,Pentium, MMX, SIMD, IA-64, ...) ARM (v1,v2…v8) 1985- 23

Why Do Computer Architecture? RAPID CHANGES It is exciting! It has never been more exciting! It impacts every other aspect of electrical engineering and computer science 24

Flipped Classroom Outline-25

Flipped Classroom Before class: In class: Watch video and learn it by yourself (or group study) Submit two question-and-answers to iLMS by each group before noon every Friday In class: First part: Question and answer (for general question) Second part: Group study and individuals tutored by TAs and teacher A set of questions discussed in each group Third part: Tournament Submission of final answer sheet/group Outline-26

Flipped Classroom After class Review the course and complete assignments Take midterm and final exams Submit one final project Outline-27

Group Performance Forming study groups. Each group has 5-6 students. For members in the same group, their group performance will be the same Advanced learner will help less advanced learner! Group performance (in each class period) First part: Student participation and interaction with teacher (teacher asks question or students raise question) – each group has at most 2 points Second and third parts: Group discussion : prepare your answers Tournament – 2 points are given to the two groups (question-group and answer-group) Submission of answer sheet – 1 point Outline-28

In Class – Second & Third Parts Second and third parts: TA is the moderator Each group prepares two question-and-answers and upload the questions to http://lms.nthu.edu.tw/course/26714 by Friday noon. Moderator checks all questions and may ask some groups to load more questions if there is too much duplication among groups. Outline-29

In Class – Second & Third Parts Group Discussion: TA will select several questions from the questions uploaded by each group and give a question sheet at the beginning of part 2 Group discussion Tournament: 2 points TA selects 5 questions from the question sheet (question-groups) TA randomly select one member of answer-groups (question unselected) to answer the question If answer-group can not answer the question, question-group has to give the answer The question may be answered on the blackboard 2 points are given to these two groups based on their performance Submission: your group answer-sheet at the end of class Outline-30

Course Administration 授課老師: 黃婷婷 辦公室: 資電442 電話: 31310 email: tingting@cs.nthu.edu.tw 助教: 陳衍昊 yhchen@cs.nthu.edu.tw 虛擬討論室時間 : 星期三 19:00~21:00 吳家承 orange172839@yahoo.com.tw 虛擬討論室時間 : 星期四 19:00~21:00 林家君 good-charlotte@hotmail.com 虛擬討論室時間 : 星期二 19:00~21:00 上課時間: CS4100-03: 星期一 13:20-16:10 上課地點: DELTA 台達 109 課程網頁: http://www.cs.nthu.edu.tw/~tingting/cs4100.html 25

Text Book RISC, RAID 史丹福大學 校長 Computer Organization and Design: The Hardware/Software Interface, 5th ed., David Patterson and John Hennessy, 2013 RISC, RAID 史丹福大學 校長 26

Topics Covered Computer Organization and Design: The Hardware/Software Interface, 5th ed., 2013 D. Patterson and J. Hennessy Topic Chapter Introduction 1 The Role of Performance 1 Instructions: Language of the Machine 2 Arithmetic for Computers 3 The Processor: Datapath and Control 4 Enhancing Performance with Pipelining 4 Exploiting Memory Hierarchy 5 27

Prerequisite Prerequisite courses: Logic design 28

Expected Course Workload Learn MIPS instruction set Learn processor emulators and benchmarking 1 final project One mid-term and one final examination Grade breakdown In-class performance 30% Assignments & Final project 10% Midterm Exam (6-8PM, Nov 11, Friday): 30% Final Exam (Jan. 9): 30% Outline-35 29

Resource on Internet to Help Your Learning Website http://www.cs.nthu.edu.tw/~tingting/cs4100.html Open Course Ware (OCW) http://ocw.nthu.edu.tw/ocw/index.php?page=course&cid=76& ShareCourse http://www.sharecourse.net/sharecourse/course/view/courseInfo/26 MOOCs http://mooc.nthu.edu.tw/sharecourse/course/view/courseInfo/100 <- need to register for the course first 30

Course Problems Cannot attend the class or be on time One absence is allowed Late = absent No point of group performance will be given Cannot turn in homework on time No late homework is accepted What is cheating? Study together in group is encouraged Work must be your own 31