ECE 2110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices Decoders.

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ECE 2110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices Encoders.

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ECE 2110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices Decoders

Decoder Multiple-input/multiple-output device. Inputs ( n ) are less than outputs ( m ). Converts input code words into output code words. One-to-One mapping : - Each input code produces only one output code. Input codes : - Binary Code - Your Code ! Output Codes 1-out-of-m code Gray Code BCD Code enable inputs

Binary Decoder Note “x” (don’t care) notation. n-to-2^n decoder : n inputs and 2^n outputs. Input code : n bit Binary Code. Output code : 1-out-of-2^n , One output is asserted for each input code. Example : n=2, 2-to-4 decoder Note “x” (don’t care) notation.

Binary 2-to-4 decoder

MSI 2-to-4 decoder Input buffering (less load) NAND gates (faster)

74x139 : Logic Symbol -Truth Table Active Low Enable, Active Low outputs Truth Table Logic Symbol Inputs Outputs G_L B A Y3 Y2 Y1 Y0 1 x x 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 1 1/2 74x139 Y0 Y0_L G_L G Y1 Y1_L A A Y2 Y2_L B B Y3 Y3_L

Complete 74x139 Decoder

3-to-8 decoder

74x138 3-to-8-decoder symbol

Decoder cascading 4-to-16 decoder

More cascading 5-to-32 decoder

Implementing the Canonical Sum The binary decoder generates all minterms of n-variable logic function. The canonical sum ( sum of minterms ) of a logic functions is obtained by adding all minterms of that function: -Match the order of input bits -Activate Enable inputs Example : How about : +5V 74x138 Y0 G1 Y1 G2A Y2 G2B F Y3 Y4 Z A Y5 Y B Y6 X C Y7

Logic design using Decoders Advantages : - Flexibility - Multiple-output Logic functions Disadvantages : - Complexity : for large number of inputs ( 5-variable Function with 3 minterms ! F= AB’CD’E + A’BC’DE+A’BCDE’ ) A practical alternative : PLD’s ECE4110 for more details

Decoder applications Microprocessor memory systems selecting different banks of memory Microprocessor input/output systems selecting different devices Microprocessor instruction decoding enabling different functional units Memory chips enabling different rows of memory depending on address Lots of other applications

Next… Encoders Reading Wakerly CH-6.5