The Digital Logic Level College of Computer and Information Sciences, Majmaah University, AlMajmaah Chapter 5 The Digital Logic Level Dr. Mohsen NASRI Merci Mr le président Mr. Les membres de jury; Je commencerai cette présentation en vs souhaitant la bienvenue à l’occasion de la conclusion de mes travaux sur les approches….sujet principale de cette setenance. College of Computer and Information Sciences, Majmaah University, Al Majmaah m.nasri@mu.edu.sa

Gates and Boolean Algebra Logic Gate Truth Table AND OR NOT A B Y 0 0 0 0 1 0 1 0 0 1 1 1 A B Y 0 0 0 0 1 1 1 0 1 1 1 1 A Y 0 1 1 0 NAND A B Y 0 0 1 0 1 1 1 0 1 1 1 0 NOR A B Y 0 0 1 0 1 0 1 0 0 1 1 0

Gates and Boolean Algebra 1 A 1 A 1 A A A 0 dominates in AND 0 blocks the output 1 passes signal A 1 dominates in OR 1 blocks the output 0 passes signal A Identity A * 1 = A A + 1 = 1 A * 0 = 0 A + 0 = A Complement A + A’ = 1 A * A’ = 0

Gates and Boolean Algebra Cont… Distributive Law A(B+C) = AB + AC A+BC = (A+B)(A+C) A B A B C A C A B A B C A C Associativity (A+B) + C = A + (B+C) C A A B B C

Gates and Boolean Algebra Cont… Associativity (AB)C = A(BC) C A A B B C DeMorgan’s Law (A+B)’ = A’B’ (AB)’ = A’ + B’ Consensus Theorem AC + AB + BC’ = AC + BC’

Circuit Equivalence Construction of (a) NOT, (b) AND, and (c) OR gates using only NAND gates or only NOR gates.

Circuit Equivalence Cont… Two equivalent functions (a) AB + AC, (b) A(B + C).

Circuit Equivalence Cont… Some identities of Boolean algebra.

Circuit Equivalence Cont… Alternative symbols for some gates: (a) NAND, (b) NOR, (c) AND, (d) OR

Circuit Equivalence Cont.. (a) The truth table for the XOR function. (b-d) Three circuits for computing it.

An SSI chip containing four gates. Integrated Circuits An SSI chip containing four gates. Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

Multiplexers A multiplexer can use selecting bits to choose one of several input bits to be the output. A selector chooses a single data input and passes it to the MUX output It has one output selected at a time. Consists of: 2n Inputs Output (single) n Selectors (depends on # of inputs)

Multiplexers examples 2 to 1 line multiplexer d S Truth table S d a 1 b 4 to 1 line multiplexer Truth table a b S c d Sel1 MSB Sel1 Sel0 LSB

Multiplexers examples 8 to 1 line multiplexer Truth table B A C D0 D1 D2 D3 D4 D5 D6 D7 F F A B C D0 D1 1 D2 D3 D4 D5 D6 D7

Multiplexers Examples 8 to 1 line multiplexer B A C D0 D1 D2 D3 D4 D5 D6 D7 F

A demultiplexer connects the data input to the selected output. Demultiplexers A demultiplexer connects the data input to the selected output. A selector chooses one of the multiple data input and passes it to the single output It has one intput selected at a time. Consists of: One Input 2n Output n Selectors (depends on # of inputs)

Demultiplexers Examples 1 to 4 Demultiplexer Truth table Out0 In S1 S0 I A B Out1 Out2 Out3 A B D0 D1 D2 D3 I 1 D0 D1 D2 D3

Demultiplexers Examples 1 to 4 Demultiplexer I D0 D1 D2 D3 Out0 In S1 S0 I A B Out1 Out2 Out3 D0 D1 D2 D3

A decoder converts input code words into output code words. A decoder chooses one of the multiple data input by decoding the binary value on the inputs. Consists of: n Inputs 2n Output

Decoder Examples 2 to 4 Decoder circuit B A I0 I1 Out0 Out1 Out2 Out3 msb Truth table A B D0 D1 D2 D3 1

Decoder Examples Cont… 2 to 4 Decoder circuit B A D0 D1 D2 D3 B I0 I1 A Out0 Out1 Out2 Out3 D0 D1 D2 D3

Decoder Examples Cont… 3 to 8 Decoder circuit Truth table C I0 I1 B Out0 Out1 Out2 Out3 D0 D1 D2 D3 A D4 D5 D6 D7 I2 Out4 Out5 Out6 Out7 D7 D6 D5 D4 D3 D2 D1 D0 C B A 1

Decoder Examples Cont… 3 to 8 Decoder circuit C I0 I1 B Out0 Out1 Out2 Out3 D0 D1 D2 D3 A D4 D5 D6 D7 I2 Out4 Out5 Out6 Out7

Adders Half adder Truth table (b)

Adders Cont… 1-bit Adder

Arithmetic Logic Units A 1-bit ALU.

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