Programming Microcontroller UART - Serial communic. 4- 1 Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter Week 4 – Spring Term 2017 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte Burst Flash OTP Mem UART I2C SPI TIM RTC EXT. Bus GPIO USB 2.0FS CAN 2.0B Enet MAC PFQ BC DMA INTR Cntl ARM966E CORE w/DSP 96 MHz CLK Cntl ADC LVD BOD PLL JTAG ETM9 STM32F407

Typical serial communication (low level) UART - Serial communic. 4- 2 Full-duplex interface Device 1 (Data Set) Receive Transmit Device 2 (Data Termial) Transmit Receive -PC -embedded system -modem -barcode reader -printer -display (with terminal emulation software) -data logger -sensor (simple or complex) -dongle (security element) -I/O module (digital, analog, encoder, PT100) -wireless interface PC Embedded system

RS-232-C pin assignments D-Sub male on PC UART - Serial communic. 4- 3 Pin DB9 DB25 Symbol Direction Text Out In 1 8 DCD  Data Carrier Detect 2 3 Rx Receive Data Tx  Transmit Data 4 20 DTR Data Terminal Ready 5 7 Gnd Signal Ground 6 DSR Data Set Ready RTS Request to Send CTS Clear to Send 9 22 RI Ring Indicator Male -> Stecker Female -> Buchse RS-232-C: Radio Sector, American Standard since 1969s EIA: Electronic Industry Alliance

Serial data format (logical representation) UART - Serial communic. 4- 4 1-2 stop bits 1 lsb msb 5-8 data bits n Parity bit if enabled start time lsb: least significant bit (20) msb: most significant bit (2 db-1) Normally one Byte is sent as 8 data bits Or: One Byte is sent as 7 data bits + parity 1 bit time = 1 / baudrate Example: parity enabled, 2 stop bits

Start -> Development -> HTerm UART - Serial communic. Hyperterminal usage 4- 5 Start -> Development -> HTerm

UART – What is it good for? UART - Serial communic. UART – What is it good for? 4- 6 Simple serial communication (3-wire) Multiple physical interfaces: EIA-232 Peer-to-peer (former RS-232-C 1969). Gnd based (-15..-3,3..15 V) EIA-485 Party Line, multi-point link (SCSI, ISDN, ... EIA-422 : Balanced lines, no ground link (D+/D-) on drivers up to 1'000m @ 100 kbps. Point-to-point or multi-drop. 0-5 V. Twisted-pair cable Easy setup Direct programming Byte level only USB will not replace cheap and simple communications EIA: Electronic Industry Alliance

EIA-485 Party Line, multi-point link UART - Serial communic. 4- 7

UART - Serial communic. Hardware flow control 4- 8 RTS will be switched on and off by programmable receiver FIFO watermarks

UART features (1/3) Full duplex, asynchronous communications UART - Serial communic. UART features (1/3) 4- 9 Full duplex, asynchronous communications NRZ standard format (Mark/Space) Configurable oversampling method by 16 or by 8 to give flexibility between speed and clock tolerance Fractional baud rate generator systems Common programmable transmit and receive baud rate (refer to the datasheets for the value of the baud rate at the maximum APB frequency Programmable data word length (8 or 9 bits) Configurable stop bits - support for 1 or 2 stop bits Transmitter clock output for synchronous transmission IrDA SIR encoder decoder Support for 3/16 bit duration for normal mode

USART features (2/3) Smartcard emulation capability UART - Serial communic. USART features (2/3) 4- 10 Smartcard emulation capability The Smartcard interface supports the asynchronous protocol Smartcards as defined in the ISO 7816-3 standards 0.5, 1.5 stop bits for Smartcard operation Single-wire half-duplex communication Configurable multi buffer communication using DMA (direct memory access) Buffering of received/transmitted bytes in reserved SRAM using centralized DMA Separate enable bits for transmitter and receiver Transfer detection flags Receive buffer full Transmit buffer empty End of transmission flags

USART features (3/3) Parity control Four error detection flags UART - Serial communic. USART features (3/3) 4- 11 Parity control Transmits parity bit Checks parity of received data byte Four error detection flags Overrun error Noise detection Frame error Parity error Ten interrupt sources with flags Multiprocessor communication - enter into mute mode if address match does not occur Wake up from mute mode (by idle line detection or address mark detection) Two receiver wakeup modes: Address bit (MSB, 9th bit), Idle line

UART - Serial communic. 4- 12 USART Block diagram RM0090 figure 296

UART - Serial communic. USART Register Map 4- 13

USART Status Register (USART_SR) (1010/1745 of RM0090) ADC 3- 14 Address Offset : 0 TXE: Transmit data register empty 0: Data is not transferred to the shift register 1: Data is transferred to the shift register RXNE: Read data register not empty 0: Data is not received 1: Received data is ready to be read.

USART Data Register (USART_DR) (1013/1745 of RM0090) UART - Serial communic. 4- 15 Address Offset : 4 DR[8:0]: Data value

USART Baud Rate Register (USART_BRR) (1013/1745 of RM0090) UART - Serial communic. 4- 16 Address Offset : 8 DIV_Mantissa[11:0]: mantissa of USARTDIV DIV_Fraction[3:0]: fraction of USARTDIV

Fractional Baud Rate generator UART - Serial communic. 4- 17  Every baud rate generator has errors. Check the tolerance! BRCLK: baud rate clock

ADC Control Register 1 (USART_CR1) (1013/1745 of RM0090) 3- 18 Address offset : 0x0C UE: USART enable 0: USART pre-scaler and outputs disabled 1: USART enabled M: Word length 0: 1 Start bit, 8 Data bits, n Stop bit 1: 1 Start bit, 9 Data bits, n Stop bit TE: Transmitter enable 0: Transmitter is disabled 1: Transmitter is enabled RE: Receiver enable 0: Receiver is disabled 1: Receiver is enabled and begins searching for a start bit

ADC Control Register 2 (ADC_CR2) (1016/1745 of RM0090) 3- 19 Address offset : 0x10 STOP[1:0]: STOP bits 00: 1 Stop bit 01: 0.5 Stop bit 10: 2 Stop bits 11: 1.5 Stop bit

ARM Peripheral Bus 2 access (APB2) ADC ARM Peripheral Bus 2 access (APB2) 2- 20 Reference: page 72/185 of “STM32F405xx STM32F407xx” “Datasheet – production data”

STM32F40x pin and ball definitions ADC STM32F40x pin and ball definitions 2- 21 Reference: page 45/185 of “STM32F405xx STM32F407xx” “Datasheet – production data”

Initialization of pin PA9 & PA10 ADC Initialization of pin PA9 & PA10 3- 22 GPIOA Module GPIO Mode Register (GPIOA_MODER) Choose alternate function mode for the pin 9 (MODER9[1:0] = 0b10) Choose alternate function mode for the pin 10 (MODER10[1:0] = 0b10) GPIO alternate function low register (GPIOA_AFRH) Select alternate function AF7 for the pin 9 (AFRL9[3:0] = 0b0111) Select alternate function AF7 for the pin 10 (AFRL10[3:0] = 0b0111) GPIO port pull-up/pull-down register (GPIOA_PUPDR) Choose pull-up for the pin 9 (PUPDR9[1:0] = 0b01) Choose pull-up for the pin 10 (PUPDR10[1:0] = 0b01)

Initialization of USART1 UART - Serial communic. Initialization of USART1 4- 23 USART1 Module USART1 Control Register 1 (USART1_CR1) Enable the transmission and reception modes (TE = 0b1 & RE = 0b1) Set the word length to 8 bits (M = 0b0) Disable the parity control (PCE = 0b0) USART2 Control Register 2 (USART1_ACR2) Chose one stop bit (STOP[1:0] = 0b00) USART1 Baud Rate Register (USART1_BRR) Fix the baud rate at 115200 Baud (USART1_BRR[15:0] = 0x2D9) Enable the USART1 (UE = 0b1)

Send & Receive a byte USART1 Module Send a byte Receive a byte ADC Send & Receive a byte 3- 24 USART1 Module Send a byte Wait until the USART1 is ready to send TXE bit of USART1_SR Write the byte to be send into USART1_DR Receive a byte Wait until the USART1 has received a byte RXNE bit of USART1_SR Read the received byte from USART1_DR