The Triplets – ROM & RAM & Cache

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Presentation transcript:

The Triplets – ROM & RAM & Cache Primary Storage The Triplets – ROM & RAM & Cache

Intro History Travel Cache ROM RAM

History Vacuum Tube Transistor SRAM – Static RAM DRAM – Dynamic RAM 1-bit per cell No refresh - fast DRAM – Dynamic RAM More compact Need refresh – slows speed

History Vacuum Tubes to Transitors Original Memory modules

History SDR SDRAM – Now obsolete PC 100 & PC-133 Computes on 16Bit per clock cycle

History DDR - Old Double clock speed 100, 133, 166 and 200 MHz

History DDR2 – Still Used Double clock speed;about 2-5% gain over DDR 400, 533, 667, 800, & 1066 MHz

History DDR3 – 2008 and beyond More Speed 1066, 1333, 1600, 1800, & 2000 MHz

History SIMM DIMM Single In-Line Memory Module 30-pin 72-pin DIMM Dual In-Line Memory Module 72-pin to 288-pin DDR – DDR4

Travel

Cache On CPU Different from registers FAST!!!! Expensive Limited space Between 5% and 100% of CPU speed Expensive Limited space Different from registers Not connected to CU or A/LU

ROM Boot Constant instructions

RAM Main memory Slower than cache Cheaper than cache Easy to expand Approx 1% of CPU speed Cheaper than cache Easy to expand CPU can change Addressed