Instructions at the Lowest Level Some of this material can be found in Chapter 3 of Computer Architecture (Carter) CSIT 301 (Blum)

CSIT 301 (Blum)

Bus Keyboard encoder Input port 1 Accumulator Flags ALU Input port 2 Prog. counter TMP Mem.Add.Reg. B Memory C MDR Output port 3 Display Instr. Reg. Output port 4 CSIT 301 (Blum) Control

Micro-code Let us now examine the steps involved in the assembly (machine language) instruction Load Accumulator A. Recall that the Accumulator is a register associated with the ALU. If you want to do something as simple as adding two numbers you start by pitting the first number in the Accumulator. CSIT 301 (Blum)

What do you mean by Load? There are different types of Loads Load Instruction and address Data at specified address to be put in Acc. A Load immediate Instruction and data Data in instruction sent directly to Acc. A Load indirect Instruction and address of address The data in the location indicated by the instruction holds another address, and that address has the data to be placed in Acc. A CSIT 301 (Blum)

Addressing modes These variations on instructions are known as addressing modes. For now we will consider the Load – as opposed to Load Immediate or Load Indirect CSIT 301 (Blum)

Fetch Cycle Address State: the value of the program counter (which recall is the address of line of the program to be performed) is put into memory address register. Increment State: the program counter is incremented, getting it ready for the next time. Memory State: the current line of the program is put into instruction register (so Control knows what to do). CSIT 301 (Blum)

Execution cycle (Load Acc. A) The remaining steps depend on the specific instruction and are collectively known as the execution cycle. Recall the instruction consisted of a load command and an address. A copy of the address is now taken from the instruction register over to the memory address register. The value at that address is loaded into Acc. A. For the load command, there is no activity during the sixth step. It is known as a "no operation" step (a "no op" or "nop"). CSIT 301 (Blum)

Data Movement Many of the micro-code steps involve moving data and addresses to various locations (registers, memory locations, etc.) The information is often, but not always, sent over the bus. So information must be put on and taken from the bus. CSIT 301 (Blum)

Controlling a register One enters a value into a register (i.e. loads it) If the load control input is active When the clock is at the appropriate part of its cycle (e.g. positive edge) If a register is allowed to place its value on the bus, it will have an enable control input. It will do so When the enable control input is active CSIT 301 (Blum)

The clock pin The clock is another control pin (sometimes called a timing pin) which determines when a register takes the value on the bus. The load input determines if the register takes the value. The clock input determines when the register takes the value. CSIT 301 (Blum)

The clock A binary clock: 10101010101010101010 Each cycle (01) should take the same amount of time (the time for a cycle: the period) The number of cycles in a second is called the frequency. “On the edge:” many registers load on the clock’s edge Positive edge: as 0 goes to 1 Negative edge: as 1 goes to 0 CSIT 301 (Blum)

CSIT 301 (Blum)

Other control pins Items involved in data manipulation (as opposed to simply data movement) will require additional control pins. For example, the program counter needs to be incremented. Thus additional control pins are required These pins are sometimes also referred to as “enable” pins, as they enable a particular action CSIT 301 (Blum)

ALU control The primary data manipulator is the ALU. The control pins here select between various logic and arithmetic operations – Add, Subtract, Multiply, AND, OR, etc. CSIT 301 (Blum)

Micro-code is Micro-code is 1’s and 0’s stored in ROM The ROM output is connected to control pins. For example, one micro-code instruction is to take the value from the program counter to the memory address register So send active signals to “enable the PC” and “load the MAR” CSIT 301 (Blum)

Micro-coding Load Accumulator A To discuss coding from the bottom up, one starts with micro-code. Micro-code is “burned” into the read-only memory (ROM) of the control unit and is sent out to the control inputs of the other components. Let us examine the micro-code of the assemble level instruction Load Acc. A Assume control inputs are active when they are high CSIT 301 (Blum)

(Architecture reminder) Bus (Architecture reminder) Keyboard encoder Input port 1 Accumulator Flags ALU Input port 2 Prog. counter TMP Mem.Add.Reg. B Memory C MDR Output port 3 Display Instr. Reg. Output port 4 CSIT 301 (Blum) Control

Control pins  Assume here that 1 is active and 0 is inactive – “active high” Address State: the value of the program counter (which recall is the address of line of the program to be performed) is put into memory address register. CSIT 301 (Blum)  

Increment State: the program counter is incremented, getting it ready for the next time. CSIT 301 (Blum)

Memory State: the current line of the program is put into instruction register (so Control knows what to do). CSIT 301 (Blum)

Recall the instruction consisted of a load command and an address Recall the instruction consisted of a load command and an address. A copy of the address is now taken over to the memory address register. CSIT 301 (Blum)

The value at that address is loaded into Accumulator A. CSIT 301 (Blum)

For the load command, there is no activity during the sixth step For the load command, there is no activity during the sixth step. It is known as a "no operation" step (a "no op" or "nop"). CSIT 301 (Blum)

These 1’s and 0’s are MICRO-CODE. (Don’t confuse micro-code with macro-code.) It is fed directly to the hardware (specifically the control pins of the devices). Unless you are a hardware manufacturer, you usually don’t program at this level known as microprogramming. You might copy someone else’s code when you flash the BIOS. CSIT 301 (Blum)

ROM for other addressing modes? What would the ROM look like for the other versions of Load? Load Immediate? Load Indirect? CSIT 301 (Blum)

Load Immediate CSIT 301 (Blum) Program Counter Enable   Program Counter Enable Program Counter Load Program Counter Increment Memory Address Register Load Memory Read Memory Write Memory Data Register Enable Memory Data Register Load Instruction Register Enable Instruction Register Load Accumulator Enable Accumulator Load Address state 1 Increment state Memory State Instr. Address to MAR Data to Accumulator No-op CSIT 301 (Blum)

Load Indirect CSIT 301 (Blum) Program Counter Enable   Program Counter Enable Program Counter Load Program Counter Increment Memory Address Register Load Memory Read Memory Write Memory Data Register Enable Memory Data Register Load Instruction Register Enable Instruction Register Load Accumulator Enable Accumulator Load Address state 1 Increment state Memory State Instr. Address to MAR Data to Accumulator No-op CSIT 301 (Blum)

The “von Neumann bottleneck" Our basic approach is to get the instruction from memory (fetch) Get the data from memory or put data in memory, etc. (execute) We go back and forth between the memory and CPU, one instruction at a time. This is sometimes called the “von Neumann bottleneck.” Ideas like caching and pipelining attempt to speed the process up but they don’t vary from the overall approach. CSIT 301 (Blum)

CSIT 301 (Blum)

Lots of registers After Memory, Control and the ALU, most of the other items in this architecture are registers. A counter is a register that can increment Registers are small units of memory that are associated with the processor. The registers serve various special purposes. In some cases, main memory could be used in place of a particular register, but using the register speeds up the processor. CSIT 301 (Blum)

Speeding up the process Registers are faster than main memory because writing to or reading from a block of memory is (at least) a two-step process Specify the address Read or write a value at that address A register is a single unit of memory and thus eliminates the first step. (There is also a vicinity consideration, the registers are on the processor chip, the memory is on a separate chip or chips.) CSIT 301 (Blum)

Register size The size of the registers (the number of bits, binary digits, it has) is an important feature of a processor. A register may hold Data: thus its size may affect the range and/or precision of numbers available. Address: thus its size may affect the number of addressable locations. Instruction: thus its size may affect the number of instructions one can have. CSIT 301 (Blum)

Intel family chip comparison table from howstuffworks.com It was at 32 bits for a long time, but 64 is finally here. CSIT 301 (Blum)

CSIT 301 (Blum)

32-memory limitation With 32 bits one can address 2^32 things. In memory one addresses bytes 2^32= 4,294,967,296 bytes 4,294,967,296 bytes = 4194304 kilobytes 4194304 kilobytes = 4096 megabytes 4096 meagbytes = 4 gigabytes CSIT 301 (Blum)

Register hiding Registers play a role in programming at the assembly level, but their use is hidden when one programs with high-level languages. (The programming language C allows for some low-level programming.) This is an example of those familiar ideas Layering Information hiding CSIT 301 (Blum)

CSIT 301 (Blum)

CSIT 301 (Blum)

CSIT 301 (Blum)

CSIT 301 (Blum)

CSIT 301 (Blum)

References Computer Architecture, Nicholas Carter Computer Organization and Design, David A. Patterson and John L. Hennessey Digital Computer Electronics, Albert P. Malvino and Jerald A. Brown http://en.wikipedia.org/wiki/Addressing_mode CSIT 301 (Blum)